We are using a pair of IMX250 cameras on a custom carrier (a minor variation of the devkit board) with a Xavier NX processor, configured to use four lanes per camera.
Based on a time of about 10ms for the difference between the start of frame and end of frame timestamps, it looks like the MIPI bus is running at 1Gb/s* rather than 1.5Gb/s which is the value specified in the IMX250 datasheet.
The max lane speed specified in the tegra-camera-platform device tree node is <1500000>.
What could cause the lane speed to be reduced to 1Gb/s, and is there a way to increase it to the maximum speed of 1.5Gb/s?
We are using a pair of IMX250 cameras on a custom carrier (a minor variation of the devkit board) with a Xavier NX processor, configured to use four lanes per camera.
Based on a time of about 10ms for the difference between the start of frame and end of frame timestamps, it looks like the MIPI bus is running at 1Gb/s* rather than 1.5Gb/s which is the value specified in the IMX250 datasheet.
The max lane speed specified in the tegra-camera-platform device tree node is <1500000>.
What could cause the lane speed to be reduced to 1Gb/s, and is there a way to increase it to the maximum speed of 1.5Gb/s?
* Calculation for transfer rate is