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VHDL-LS misses length comparision #189

Open ungultig1 opened 1 year ago

ungultig1 commented 1 year ago

Hello,

VHDL_LS won’t detect length mismatch on comparing two registers e.g.: slv_output(13 downto 0) <= slv_result(11 downto 0)

Is there any settings/flags I’ve missed, which activates this error-check also? Am I able to set any flags for VHDL-LS compiler? Where?

thx. greetings.

Rutherther commented 1 year ago

I think this has not been implemented so far see #175.