VILLASframework / fpga

Archived: VILLASfpga has been integrated into the VILLASnode repo
https://fein-aachen.org/en/projects/villas-fpga/
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Memory Manager: use global graph for address translations - [closed] #39

Closed stv0g closed 1 year ago

stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 14:30

Merges feature/memory-manager -> develop

This MR implements a global memory graph of memory mappings between address spaces. The graph can be traversed to get a translation from one (master) address space to another (slave) address space.

Currently incorporates !1, so !1 should be merged first and then this MR should be rebased (maybe Gitlab can do this automatically?).

stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 14:34

added 23 commits

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stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 14:37

added 1 commit

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stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 15:49

added 2 commits

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stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 16:15

added 18 commits

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stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 17:43

added 4 commits

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stv0g commented 6 years ago

In GitLab by @daniel-k on Feb 13, 2018, 17:56

added 1 commit

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stv0g commented 6 years ago

I rebased the branch to feature/memory-manager-rebased

stv0g commented 6 years ago

closed