VILLASframework node issues

VILLASframework / node

Connecting real-time power grid simulation equipment

https://fein-aachen.org/projects/villas-node/

Apache License 2.0

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issues

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Update `libiec61850` to 1.6

#819 PJungkamp opened 1 week ago
1
ethercat: Shuffle includes to fix failing Nix builds

#818 PJungkamp closed 2 weeks ago
0
Protobuf: Remove include dependency on generated header

#817 n-eiling closed 2 weeks ago
0
Refactor: Integrate PciDevice with new Driver Interface

#816 IgnoreWarnings opened 2 weeks ago
1
fix: Remove dead code from iec61850 SV node-type

#815 stv0g closed 3 weeks ago
0
Refactor: Device refactor to integrate Platform-Devices

#814 IgnoreWarnings closed 1 week ago
4
fix(iec61850-9-2): Fix Sampled Values node-type for NEIS paper

#813 stv0g closed 1 month ago
0
nix: Update Flake inputs

#812 stv0g closed 1 month ago
0
Rt optimizations rebased

#811 n-eiling opened 1 month ago
4
VFIO-Container: Minimize default requirements

#810 IgnoreWarnings closed 1 month ago
0
FPGA: Add new jsons

#809 IgnoreWarnings closed 4 weeks ago
3
FPGA: Device and Driver

#808 IgnoreWarnings opened 1 month ago
5
FPGA: Device and Driver (external branch)

#807 IgnoreWarnings closed 1 month ago
1
Install Protobuf header and FPGA fixes

#806 n-eiling closed 2 weeks ago
2
VfioContainer: Make "getOrAttachGroup" method public

#805 IgnoreWarnings closed 1 month ago
1
Bug: "Cannot parse baseaddress from parameters"

#804 IgnoreWarnings closed 1 month ago
1
BugFix: Make parsing of baseaddress optional

#803 IgnoreWarnings closed 1 month ago
4
Add support for passing options to `kernel::loadModule()`

#802 IgnoreWarnings opened 1 month ago
1
hwh parser: Add new module, ignore value error, Copy of #794 with pipeline fix

#801 IgnoreWarnings closed 1 month ago
0
Fix static initialization

#800 n-eiling closed 1 month ago
6
static logger initialization and subsequent static initializations using logging.get is undefined behavior

#799 n-eiling closed 1 month ago
1
Shared Memory Example not working

#798 morje-datta opened 1 month ago
5
Add a script to bind platform devices

#797 IgnoreWarnings closed 1 month ago
1
Core baseaddress (Fixed CI)

#796 IgnoreWarnings closed 1 month ago
0
Add Baseaddress to Core

#795 IgnoreWarnings closed 1 month ago
1
hwh parser: Add new module, ignore value error

#794 IgnoreWarnings closed 1 month ago
3
FPGA: move float conversion to fpga and various fixes

#793 n-eiling closed 1 month ago
6
Card classes and Card factories are in same file

#792 IgnoreWarnings closed 2 months ago
1
Refactor: Split core make into multiple functions

#791 IgnoreWarnings closed 2 months ago
2
Use same memory accessor for FPGA memory write and read

#790 IgnoreWarnings closed 2 months ago
5
cmake: fix common not being installed

#789 n-eiling closed 3 months ago
0
ci: improve gitlab CI

#788 n-eiling closed 3 months ago
3
Various fixes for the DPsim Interface

#787 n-eiling closed 3 months ago
2
fpga: use separate locks for write and read to allow them to be used concurrently

#786 n-eiling closed 3 months ago
0
Fixes for NEIS paper submission

#785 stv0g closed 3 months ago
0
Connections via WebSockets which are missing a node-name are causing a segfault

#784 stv0g opened 3 months ago
0
Add support for FPGAs connected via the vfio-platform driver

#783 IgnoreWarnings opened 3 months ago
3
Value array seems to be empty

#782 al3xa23 opened 3 months ago
0
Pi5 runner

#781 windrad6 closed 1 month ago
4
FPGA: code improvements, bug fixes, etc.

#780 n-eiling closed 3 months ago
0
hypersim: Update UCM code for multiple signal values

#779 stv0g closed 4 months ago
0
Update .gitlab-ci.yml

#778 n-eiling closed 5 months ago
0
Remove superfluous includes

#777 stv0g closed 5 months ago
0
Harmonize formatting and style of example configuration files

#776 stv0g closed 5 months ago
0
Harmonize descriptions of plugins

#775 stv0g closed 5 months ago
0
Nix improvements

#774 stv0g closed 5 months ago
0
webrtc: Fix several TODOs and other smaller tweaks

#773 stv0g closed 5 months ago
0
Port test_rtt node-type to C++

#772 stv0g closed 5 months ago
0
Port Pool, Queue and Signalled Queue to C++

#771 stv0g opened 5 months ago
0
Port RTP node-type to C++

#770 stv0g opened 5 months ago
0