added the ICAP - Githubissues

VLSI-EDA / PoC

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

https://tu-dresden.de/ing/informatik/ti/vlsi

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added the ICAP #20

Closed krabo0om closed 8 years ago

krabo0om commented 8 years ago

a FSM parses the bitstream and controls the ICAP a controller handles the data streams and controls the FSM controller for Xillybus and Dini are available

Paebbels commented 8 years ago

Hello Paul,

please rename all entitie files in the src\xil\reconfig directory to reconfig_*.vhdl and also rename you entities to reconfig_* to match the namespace pattern of PoC.

Regards Patrick

krabo0om commented 8 years ago

Dear Patrick,

I am pleased to be able to inform you that I made the requested changes and I would be delighted if you would consider my pull request again! I look forward to your reply.

Best wishes, Paul

Paebbels commented 8 years ago

Looks good to me.