IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
As pull request #24 shows, PoC has a list of required or recommended project settings for each supported vendor tool chain. These should be documented on RTFD.
As pull request #24 shows, PoC has a list of required or recommended project settings for each supported vendor tool chain. These should be documented on RTFD.
Xilinx ISE:
--use_new_parser yes
-sd <pathes>
Xilinx Vivado: