VLSI-EDA / PoC

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
https://tu-dresden.de/ing/informatik/ti/vlsi
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PyInfra: Add tool support for Xilinx Vivado IP Catalog #40

Open Paebbels opened 7 years ago

Paebbels commented 7 years ago

Xilinx Vivado uses a new IP-XACT-based file format (*.xci) to describe IP cores in their IP catalog. PoC needs to support the extraction of source codes and generation of netlists from these files.

Note: PoC can already handle Xilinx Core Generator files (*.xco) from Xilinx ISE.