Open bhamadicharef opened 7 years ago
Seems that it gets fixed by
Value := std_logic_vector(resize(signed(slv), Value'length));
Thanks for your feedback! Please, use the unsigned
version of resize
to make it semantically correct. Would you want to turn this fix into a pull request then?
The needed resize
function is define in utils.vhdl
. There is no need to rewrite the code.
The question is why doesn't Vivado 2016.2 find that overload.
resize
on std_logic_vector
is ill-defined as it has to make assumptions about signedness. I would rather fence in its use and put it on a deprecation path.
Why is it ill-defined? It makes no assumptions about signedness!
See at the definition in utils, how you wrote it. It's using a fill parameter.
Yes, and it even has implied semantics using the index direction as a hint for alignment. I would now consider this another feature hard to convey. Although I admittedly tried, std_logic_vector
simply does not have an intuitively right semantics for resize
. And I do not see why I should not allow my own mistakes to phase out - at least, eventually. The standard libraries provide valid implementations as soon as the types have clear semantics associated with them. Just use those.
Mmhhh, the first of these uses would even be semantically correct ...
I want to use the function
raw_format_slv_hex
from string.vhdl. Vivado 2016.2 gives an error on line 359 about the followingError message is
How to fix ? Is it specific to Vivado ?
Brahim @ DCT :: DSI