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VLSIDA / OpenRAM

An open-source static random access memory (SRAM) compiler.
http://www.openram.org
BSD 3-Clause "New" or "Revised" License
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Could not find the "fet_libraries" or "fet_models" during the compilation. #182

Open apaul33 opened 1 year ago

apaul33 commented 1 year ago

Describe the bug A clear and concise description of what the bug is.

While running the compiler for an individual PDK, the compiler could not get the fet libraries or models that has defined on the each individual PDK's technology directory.

KeyError: AssertionError ERROR: file stimuli.py: line 56: Must define either fet_libraries or fet_models.

yielded from : While srart to run .sp files /home/azmir/OpenRAM/compiler/characterizer/stimuli.py Predicted to give error while start to generate other output files. Please refer to the log output given below, for better understanding.

Version: 1.2.1

To Reproduce What did you do to demonstrate the bug? Please include your configuration file used.

I checked the tech.py file on the PDK's tech directory to check whether fet_libraries or fet_models is defined or not. It is defined perfectly. Thus, I couldn't understand from where the error occurs.

Myconfig File:

Data word size

word_size = 2

Number of words in the memory

num_words = 16 num_banks=1

Technology to use in $OPENRAM_TECH

tech_name ="sky130"

You can use the technology nominal corner only

nominal_corner_only = True

Or you can specify particular corners

Process corners to characterize

process_corners = ["SS", "TT", "FF"]

Voltage corners to characterize

supply_voltages = [ 3.0, 3.3, 3.5 ]

Temperature corners to characterize

temperatures = [ 0, 25, 100]

Output directory for the results

output_path = "sky_130_check"

Output file base name

outputname = "sram{0}{1}{2}".format(word_size,num_words,tech_name)

Disable analytical models for full characterization (WARNING: slow!)

analytical_delay = False

Expected behavior I am expecting to generate the below files after competing the compilation

Output files: sram_2_16_sky130.lvs sram_2_16_sky130.sp sram_2_16_sky130.v sram_2_16_sky130.lib sram_2_16_sky130.py sram_2_16_sky130.html sram_2_16_sky130.log sram_2_16_sky130.lef sram_2_16_sky130.gds

The compiler can only generate the log file. | As soon as the .sp file start generating the error occurs.

Logs:

azmir@compiler:~/OpenRAM$ python3 sram_compiler.py myconfig.py |==============================================================================| |========= OpenRAM v1.2.1 =========| |========= =========| |========= VLSI Design and Automation Lab =========| |========= Computer Science and Engineering Department =========| |========= University of California Santa Cruz =========| |========= =========| |========= Usage help: openram-user-group@ucsc.edu =========| |========= Development help: openram-dev-group@ucsc.edu =========| |========= See LICENSE for license info =========| |==============================================================================| Start: 03/01/2023 11:26:40 Technology: sky130 Total size: 32 bits Word size: 2 Words: 16 Banks: 1 RW ports: 0 R-only ports: 1 W-only ports: 1 DRC/LVS/PEX is only run on the top-level design to save run-time (inline_lvsdrc=True to do inline checking). DRC/LVS/PEX is disabled (check_lvsdrc=True to enable). Characterization is disabled (using analytical delay models) (analytical_delay=False to simulate). Words per row: None Output files are: /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.lvs /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.sp /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.v /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.lib /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.py /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.html /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.log /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.lef /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.gds WARNING: file hierarchy_layout.py: line 642: Could not find pin gnd on col_cap_bitcell_2port WARNING: file hierarchy_layout.py: line 642: Could not find pin gnd on col_cap_bitcell_2port WARNING: file hierarchy_layout.py: line 642: Could not find pin gnd on col_cap_bitcell_2port WARNING: file hierarchy_layout.py: line 642: Could not find pin gnd on col_cap_bitcell_2port Submodules: 0.6 seconds Placement: 0.0 seconds ** Retrieving pins: 0.0 seconds Analyzing pins: 0.0 seconds Finding blockages: 0.2 seconds Converting blockages: 0.1 seconds Converting pins: 0.0 seconds ** Separating adjacent pins: 0.0 seconds ** Finding pins and blockages: 1.8 seconds Maze routing pins: 8.1 seconds Retrieving pins: 0.0 seconds Analyzing pins: 0.0 seconds Finding blockages: 0.7 seconds Converting blockages: 0.1 seconds Converting pins: 1.2 seconds Separating adjacent pins: 1.3 seconds Finding pins and blockages: 4.9 seconds Maze routing supplies: 49.2 seconds Routing: 78.6 seconds Verification: 0.0 seconds ** SRAM creation: 79.2 seconds SP: Writing to /home/azmir/OpenRAM/sky_130_check/sram_2_16_sky130.sp ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file bitcell_base.py: line 273: Must override build_graph function in bitcell base class. ERROR: file stimuli.py: line 52: Must define either fet_libraries or fet_models. Traceback (most recent call last): File "/home/azmir/OpenRAM/sram_compiler.py", line 83, in s.save() File "/home/azmir/OpenRAM/compiler/sram.py", line 104, in save functional(self.s, File "/home/azmir/OpenRAM/compiler/characterizer/functional.py", line 102, in init self.write_functional_stimulus() File "/home/azmir/OpenRAM/compiler/characterizer/functional.py", line 386, in write_functional_stimulus self.stim = stimuli(self.sf, self.corner) File "/home/azmir/OpenRAM/compiler/characterizer/stimuli.py", line 52, in init debug.error("Must define either fet_libraries or fet_models.", -1) File "/home/azmir/OpenRAM/compiler/debug.py", line 47, in error assert return_value == 0 AssertionError

mguthaus commented 1 year ago

I had to add this to your config to get a valid width/height of the array: num_spare_rows = 1 num_spare_cols = 1

It seems that we don't map the corners in the technology file except for TT. You can work around this with: nominal_corner_only = True for now and I will work on getting these added as a fix.