How to use the .sp&.v generated after executing config on other tools

VLSIDA / OpenRAM

An open-source static random access memory (SRAM) compiler.

http://www.openram.org

BSD 3-Clause "New" or "Revised" License

821 stars 201 forks source link

How to use the .sp&.v generated after executing config on other tools #198

Closed haotommy closed 1 year ago

haotommy commented 1 year ago

I am running the generated .sp file using Hspice, but there is no circuit. I cannot find where to modify the library in the .sp file, or which tool I can use to view my .sp file?

The .v file refers to the generated memory content and does not include the surrounding circuitry. It focuses solely on the memory itself. Regarding the absence of reset and the presence of T_Hold in the file, if you want to modify them for waveform simulation using ModelSim, you would need to make the necessary changes manually?

Alternatively, could you please tell me which file controls the generation content of the .sp and .v files?

mguthaus commented 1 year ago

I'm not sure what you mean by "no circuit". The sp file is the circuit and can be used for either simulation or LVS.

The Verilog file is just for behavioral modeling and is not synthesizable. The memory is for use by your own project and doesn't have any surrounding circuitry.

haotommy commented 1 year ago

[image: image.png] This is the result I obtained when running the generated .sp file with Hspice: It shows an error message: "no element found in circuit!!" However, I cannot find where I can modify the process of my library.

[image: image.png] The following files are the generated .v file for a 64x64 memory (with added reset) and a self-written test bench. When running ModelSim, I observe a red line in the waveform at dout0. Is this due to the issue with T_Hold? Is the waveform generated from the .v file considered normal?

Matt Guthaus @.***> 於 2023年7月4日週二上午2:16寫道：

Closed #198 https://github.com/VLSIDA/OpenRAM/issues/198 as completed.

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#event-9712391360, or unsubscribe https://github.com/notifications/unsubscribe-auth/A47LP6G2M57XQZFE5FFBXXDXOMD73ANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you authored the thread.Message ID: @.***>

mguthaus commented 1 year ago

Are you running spice on only the or are you using a stimulus file like the functional one that is generated? I don't know what you mean by "modify the process of my library".

Outputs are always invalid until the read completes so you can expect some red.

Matt

On Wed, Jul 5, 2023, 02:16 haotommy @.***> wrote:

[image: image.png] This is the result I obtained when running the generated .sp file with Hspice: It shows an error message: "no element found in circuit!!" However, I cannot find where I can modify the process of my library.

[image: image.png] The following files are the generated .v file for a 64x64 memory (with added reset) and a self-written test bench. When running ModelSim, I observe a red line in the waveform at dout0. Is this due to the issue with T_Hold? Is the waveform generated from the .v file considered normal?

Matt Guthaus @.***> 於 2023年7月4日週二上午2:16寫道：

Closed #198 https://github.com/VLSIDA/OpenRAM/issues/198 as completed.

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#event-9712391360, or unsubscribe < https://github.com/notifications/unsubscribe-auth/A47LP6G2M57XQZFE5FFBXXDXOMD73ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1621355633, or unsubscribe https://github.com/notifications/unsubscribe-auth/AC67SLZU7GJLPT32NWPZL2TXOUWF5ANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you modified the open/close state.Message ID: @.***>

haotommy commented 1 year ago

Because I want to see the results of my .sp file, I would like to ask what is the process node used for fabrication? Specifically, what are the process nodes for freepdk45, scn3me_subm, and scn4m_subm?

Matt Guthaus @.***> 於 2023年7月5日週三下午10:36寫道：

Are you running spice on only the or are you using a stimulus file like the functional one that is generated? I don't know what you mean by "modify the process of my library".

Outputs are always invalid until the read completes so you can expect some red.

Matt

On Wed, Jul 5, 2023, 02:16 haotommy @.***> wrote:

[image: image.png] This is the result I obtained when running the generated .sp file with Hspice: It shows an error message: "no element found in circuit!!" However, I cannot find where I can modify the process of my library.

[image: image.png] The following files are the generated .v file for a 64x64 memory (with added reset) and a self-written test bench. When running ModelSim, I observe a red line in the waveform at dout0. Is this due to the issue with T_Hold? Is the waveform generated from the .v file considered normal?

Matt Guthaus @.***> 於 2023年7月4日週二上午2:16寫道：

Closed #198 https://github.com/VLSIDA/OpenRAM/issues/198 as completed.

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#event-9712391360, or unsubscribe <

https://github.com/notifications/unsubscribe-auth/A47LP6G2M57XQZFE5FFBXXDXOMD73ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1621355633, or unsubscribe < https://github.com/notifications/unsubscribe-auth/AC67SLZU7GJLPT32NWPZL2TXOUWF5ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1621894826, or unsubscribe https://github.com/notifications/unsubscribe-auth/A47LP6GRWYFJOWEH4Q7UO2LXOV3XFANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you authored the thread.Message ID: @.***>

mguthaus commented 1 year ago

https://github.com/VLSIDA/OpenRAM/blob/stable/docs/source/index.md#supported-technologies

On Wed, Jul 5, 2023, 23:55 haotommy @.***> wrote:

Because I want to see the results of my .sp file, I would like to ask what is the process node used for fabrication? Specifically, what are the process nodes for freepdk45, scn3me_subm, and scn4m_subm?

Matt Guthaus @.***> 於 2023年7月5日週三下午10:36寫道：

Are you running spice on only the or are you using a stimulus file like the functional one that is generated? I don't know what you mean by "modify the process of my library".

Outputs are always invalid until the read completes so you can expect some red.

Matt

On Wed, Jul 5, 2023, 02:16 haotommy @.***> wrote:

[image: image.png] This is the result I obtained when running the generated .sp file with Hspice: It shows an error message: "no element found in circuit!!" However, I cannot find where I can modify the process of my library.

[image: image.png] The following files are the generated .v file for a 64x64 memory (with added reset) and a self-written test bench. When running ModelSim, I observe a red line in the waveform at dout0. Is this due to the issue with T_Hold? Is the waveform generated from the .v file considered normal?

Matt Guthaus @.***> 於 2023年7月4日週二上午2:16寫道：

Closed #198 https://github.com/VLSIDA/OpenRAM/issues/198 as completed.

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#event-9712391360, or unsubscribe <

https://github.com/notifications/unsubscribe-auth/A47LP6G2M57XQZFE5FFBXXDXOMD73ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1621355633,

or unsubscribe <

https://github.com/notifications/unsubscribe-auth/AC67SLZU7GJLPT32NWPZL2TXOUWF5ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1621894826, or unsubscribe < https://github.com/notifications/unsubscribe-auth/A47LP6GRWYFJOWEH4Q7UO2LXOV3XFANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1623094592, or unsubscribe https://github.com/notifications/unsubscribe-auth/AC67SL3FH6FEUZGNSPRYQCDXOZOPLANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you modified the open/close state.Message ID: @.***>

haotommy commented 1 year ago

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

mguthaus commented 1 year ago

These are provided in the PDK.

On Thu, Jul 13, 2023, 08:58 haotommy @.***> wrote:

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634501616, or unsubscribe https://github.com/notifications/unsubscribe-auth/AC67SL2BCJNQ4A3VP3DWK5TXQALKFANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you modified the open/close state.Message ID: @.***>

haotommy commented 1 year ago

The PDK about these process is in the any files with OpenRAM?

Matt Guthaus @.***> 於 2023年7月14日週五上午12:02寫道：

These are provided in the PDK.

On Thu, Jul 13, 2023, 08:58 haotommy @.***> wrote:

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634501616, or unsubscribe < https://github.com/notifications/unsubscribe-auth/AC67SL2BCJNQ4A3VP3DWK5TXQALKFANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634506680, or unsubscribe https://github.com/notifications/unsubscribe-auth/A47LP6ALLWYBRVUISVPKKSDXQALW3ANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you authored the thread.Message ID: @.***>

haotommy commented 1 year ago

Do I have to contact them to provide the PDK, or does OpenRAM itself have it?

陳廷豪 @.***> 於 2023年7月14日週五下午3:37寫道：

The PDK about these process is in the any files with OpenRAM?

Matt Guthaus @.***> 於 2023年7月14日週五上午12:02寫道：

These are provided in the PDK.

On Thu, Jul 13, 2023, 08:58 haotommy @.***> wrote:

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634501616,

or unsubscribe < https://github.com/notifications/unsubscribe-auth/AC67SL2BCJNQ4A3VP3DWK5TXQALKFANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634506680, or unsubscribe https://github.com/notifications/unsubscribe-auth/A47LP6ALLWYBRVUISVPKKSDXQALW3ANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you authored the thread.Message ID: @.***>

mguthaus commented 1 year ago

You install the PDK like this:

https://github.com/VLSIDA/OpenRAM/blob/stable/docs/source/basic_setup.md#sky130-setup

The other PDKs are included.

Matt

On Tue, Jul 18, 2023, 02:13 haotommy @.***> wrote:

Do I have to contact them to provide the PDK, or does OpenRAM itself have it?

陳廷豪 @.***> 於 2023年7月14日週五下午3:37寫道：

The PDK about these process is in the any files with OpenRAM?

Matt Guthaus @.***> 於 2023年7月14日週五上午12:02寫道：

These are provided in the PDK.

On Thu, Jul 13, 2023, 08:58 haotommy @.***> wrote:

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634501616,

or unsubscribe <

https://github.com/notifications/unsubscribe-auth/AC67SL2BCJNQ4A3VP3DWK5TXQALKFANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634506680,

or unsubscribe < https://github.com/notifications/unsubscribe-auth/A47LP6ALLWYBRVUISVPKKSDXQALW3ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1639843363, or unsubscribe https://github.com/notifications/unsubscribe-auth/AC67SLZHLLKKLQB6K6GWZM3XQZHUNANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you modified the open/close state.Message ID: @.***>

haotommy commented 1 year ago

So I also need to use the OpenRAM to find the PDK about these process? Can I directly modify the .sp to change the circuit's content to another fabricated circuit?

Matt Guthaus @.***> 於 2023年7月18日週二下午5:38寫道：

You install the PDK like this:

https://github.com/VLSIDA/OpenRAM/blob/stable/docs/source/basic_setup.md#sky130-setup

The other PDKs are included.

Matt

On Tue, Jul 18, 2023, 02:13 haotommy @.***> wrote:

Do I have to contact them to provide the PDK, or does OpenRAM itself have it?

陳廷豪 @.***> 於 2023年7月14日週五下午3:37寫道：

The PDK about these process is in the any files with OpenRAM?

Matt Guthaus @.***> 於 2023年7月14日週五上午12:02寫道：

These are provided in the PDK.

On Thu, Jul 13, 2023, 08:58 haotommy @.***> wrote:

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

— Reply to this email directly, view it on GitHub < https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634501616>,

or unsubscribe <

https://github.com/notifications/unsubscribe-auth/AC67SL2BCJNQ4A3VP3DWK5TXQALKFANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634506680,

or unsubscribe <

https://github.com/notifications/unsubscribe-auth/A47LP6ALLWYBRVUISVPKKSDXQALW3ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1639843363, or unsubscribe < https://github.com/notifications/unsubscribe-auth/AC67SLZHLLKKLQB6K6GWZM3XQZHUNANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1639884946, or unsubscribe https://github.com/notifications/unsubscribe-auth/A47LP6BUD4AFBWRNRKXLPTTXQZKTDANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you authored the thread.Message ID: @.***>

haotommy commented 1 year ago

So I also need to use the OpenRAM to find the PDK about these process? Can I directly modify the .sp to change the circuit's content to another fabricated circuit?

陳廷豪 @.***> 於 2023年7月20日週四下午1:48寫道：

So I also need to use the OpenRAM to find the PDK about these process? Can I directly modify the .sp to change the circuit's content to another fabricated circuit?

Matt Guthaus @.***> 於 2023年7月18日週二下午5:38寫道：

You install the PDK like this:

https://github.com/VLSIDA/OpenRAM/blob/stable/docs/source/basic_setup.md#sky130-setup

The other PDKs are included.

Matt

On Tue, Jul 18, 2023, 02:13 haotommy @.***> wrote:

Do I have to contact them to provide the PDK, or does OpenRAM itself have it?

陳廷豪 @.***> 於 2023年7月14日週五下午3:37寫道：

The PDK about these process is in the any files with OpenRAM?

Matt Guthaus @.***> 於 2023年7月14日週五上午12:02寫道：

These are provided in the PDK.

On Thu, Jul 13, 2023, 08:58 haotommy @.***> wrote:

Since I want to run .sp simulations, does OpenRAM provide process files? Or is the technology file itself the process file?

— Reply to this email directly, view it on GitHub < https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634501616>,

or unsubscribe <

https://github.com/notifications/unsubscribe-auth/AC67SL2BCJNQ4A3VP3DWK5TXQALKFANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub < https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1634506680>,

or unsubscribe <

https://github.com/notifications/unsubscribe-auth/A47LP6ALLWYBRVUISVPKKSDXQALW3ANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you authored the thread.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1639843363,

or unsubscribe < https://github.com/notifications/unsubscribe-auth/AC67SLZHLLKKLQB6K6GWZM3XQZHUNANCNFSM6AAAAAAZ4B3D2Y>

. You are receiving this because you modified the open/close state.Message ID: @.***>

— Reply to this email directly, view it on GitHub https://github.com/VLSIDA/OpenRAM/issues/198#issuecomment-1639884946, or unsubscribe https://github.com/notifications/unsubscribe-auth/A47LP6BUD4AFBWRNRKXLPTTXQZKTDANCNFSM6AAAAAAZ4B3D2Y . You are receiving this because you authored the thread.Message ID: @.***>