Open KolliparaAbhishekAnand opened 11 months ago
Can you attach the config you used. I am having trouble replicating this issue.
word_size = 64
num_words = 16
human_byte_size = "{:.0f}kbytes".format((word_size * num_words)/1024/8)
netlist_only=True
num_spare_cols=1 num_spare_rows=1 tech_name = "sky130" process_corners = [ "TT"] supply_voltages = [ 1.8 ] temperatures = [ 27 ] num_rw_ports=1 num_r_ports=0 num_w_ports=0 write_size=None ports_human='1rw'
file_path="/home/abhishek/SINESyslab/OpenRAM/macros/sram_configs/" import os exec(open(os.path.join(os.path.dirname(file_path),'sky130_sram_common.py')).read())
I am able to read and write with these stimulus files. functional.tar.gz
Could you perhaps send your stimulus?
I am getting problem in those circuits in which number of words are 16 and data bits/word size = 64 . you have taken exactly opposite of it.
Ah, I see. I'll try that one.
are you able to replicate the issue??
Describe the bug In memory macros of size 16_64 , 16_128 , data is not getting written into memory cells . this is observed by testing on generated .sp files using ngspice as simulator tool.
Version v1.2.18 and commit 3620d56790a7153f20a509a6e804af518cde763b
To Reproduce 1.I wrote different content into memory cells , and every time the data stored is always zero in memory cells.
Expected behavior data should be written into memory cells properly. i observed this behaviour in those memory macros with word size 64 and 128.