mguthaus
commented
5 months ago You are correct that this isn't done. We hand made one for our tape out:
https://github.com/VLSIDA/openram_testchip2
The file isn't that far from the SRAM one so it wasn't that difficult.
Describe the bug Note that I'm not an expert in this, but my understanding is that we need a liberty file to do static timing analysis of a ROM when incorporating it into a larger design as a pre-hardedn macro. In particular, openlane asks for this to be added in the EXTRA_LIBS environment variable. https://github.com/The-OpenROAD-Project/OpenLane/blob/master/docs/source/reference/configuration.md#macroschip-integration
However, the current rom compiler just says "# TODO: Characterize the design":
https://github.com/VLSIDA/OpenRAM/blame/0937f86761e727ae3ba6c3e0d6df8a84a760cf8a/compiler/rom.py#L147
So this isn't actually done yet.
Has a ROM generated by OpenRAM been used in a tapeout yet? I would love to see an example if so. I am a novice at this. I was trying to make a submission for tiny tapeout 6 of a tiny ROM, but got stuck at this point because I'm not sure how to proceed without the liberty file.
Version top of dev branch
To Reproduce No reproducer