I wonder if we could do something similar as rust did with the borrow checker to ohdl.
I am currently not sure if I will do something similar to vhdl with the resolved logic type, but I tend not to.
To eliminate overlapping signals, we could say that a signal can be used multiple times as an input/read, but only one output/write should exist at a time. The compiler then would check for violations, so for example an if this than write from a, else write from b would be fine, but writing unconditionally from both would be forbidden.
Yet, I am not sure if this is good or just complicated for the end user, since we can't do something like runtime checked stuff.. thinking more about it, it's just the question of making everything safe or putting some designs behind unsafe.
Furthermore, I am not even sure if this will even be/is a problem in hardware design, time and playing around will hopefully tell me :D
I wonder if we could do something similar as rust did with the borrow checker to ohdl. I am currently not sure if I will do something similar to vhdl with the resolved logic type, but I tend not to.
To eliminate overlapping signals, we could say that a signal can be used multiple times as an input/read, but only one output/write should exist at a time. The compiler then would check for violations, so for example an if this than write from a, else write from b would be fine, but writing unconditionally from both would be forbidden.
Yet, I am not sure if this is good or just complicated for the end user, since we can't do something like runtime checked stuff.. thinking more about it, it's just the question of making everything safe or putting some designs behind unsafe. Furthermore, I am not even sure if this will even be/is a problem in hardware design, time and playing around will hopefully tell me :D