VeriSilicon / TIM-VX

VeriSilicon Tensor Interface Module
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Enable float16 bias convolution model runs on NN #612

Closed chenfeiyue-cfy closed 1 year ago

chenfeiyue-cfy commented 1 year ago

Convert float16 bias tensor to float32 to meet condition of NN convolution in driver

Caution: Clang version requires minimum 15.0

Type: Code Improvement Issue: bugzilla id:32785 | jira id VIVD-744