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VeriSilicon / TIM-VX

VeriSilicon Tensor Interface Module
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Fixed transient deconv1d generate wrong output shape bug #619

Closed chenfeiyue-cfy closed 1 year ago

chenfeiyue-cfy commented 1 year ago

Fixed bug that when deconv1d ouput is set to be transient, actual output shape will be zero at dim 1.

Reason :internal typing error Type: Bug Fix Signed-off-by: Feiyue Chen Feiyue.Chen@verisilicon.com