Fix the instance norm test input size bug in layout infer test - Githubissues

VeriSilicon / TIM-VX

VeriSilicon Tensor Interface Module

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Fix the instance norm test input size bug in layout infer test #661

Closed chenfeiyue-cfy closed 10 months ago

chenfeiyue-cfy commented 10 months ago

Correct gamma and beta size in InstanceNorm.nhwc case

Type: Bug Fix Issue: 37103