The issue unit tracks memory operations by examining the operation complete signals the sgpr and vgpr sends to the lsu. In the past when the lsu was able to perform a single register operation for each load and store this worked. Now however the lsu needs to perform multiple such operations for each memory operation. As a consequence the issue unit is prematurely advancing the program instead of waiting for the lsu to actually complete an operation. How it tracks memory operations needs to be revamped.
The issue unit tracks memory operations by examining the operation complete signals the sgpr and vgpr sends to the lsu. In the past when the lsu was able to perform a single register operation for each load and store this worked. Now however the lsu needs to perform multiple such operations for each memory operation. As a consequence the issue unit is prematurely advancing the program instead of waiting for the lsu to actually complete an operation. How it tracks memory operations needs to be revamped.