希望能编写一个openocd初始化QSPI FLASH的脚本

买的H750板子，尝试使用gcc工具链+vscode开发stm32，无奈发现无法使用openocd将程序下到这块板子的外置FLASH里，在网上找到一篇教程：使用openOCD擦写ART_Pi外部qspi_flash ，我尝试了之后没有成功，也不知道该怎么改，希望能编写一个openocd初始化QSPI FLASH的脚本。

上面帖子里的 gpio_conf_stm32.pl是:https://github.com/openocd-org/openocd/blob/36597636f2a0e9fbf7b44f2c02fb85632d4dc063/contrib/loaders/flash/stmqspi/gpio_conf_stm32.pl 运行需要安装perl环境，在控制台执行 perl gpio_conf_stm32.pl

帖子里的art_pi.cfg内容

# This is for using the onboard STLINK
source [find interface/stlink.cfg]

transport select hla_swd

set CHIPNAME stm32h750xbh6

# enable stmqspi
if {![info exists QUADSPI]} {
    set QUADSPI 1
}

source [find target/stm32h7x.cfg]

reset_config srst_only

# ART_Pi qspi.

# QUADSPI initialization
proc qspi_init {  } {
    global a
    mmw 0x580244E0 0x000007FF 0             ;# RCC_AHB4ENR |= GPIOAEN-GPIOKEN (enable clocks)
    mmw 0x580244D4 0x00004000 0             ;# RCC_AHB3ENR |= QSPIEN (enable clock)
    sleep 1                                 ;# Wait for clock startup

    # PF10:AF09:H, PF09:AF10:H, PF08:AF10:H, PF07:AF09:H, PF06:AF09:H, PG06:AF10:H

    # Port F: PF10:AF09:H, PF09:AF10:H, PF08:AF10:H, PF07:AF09:H, PF06:AF09:H
    mmw 0x58021400 0x002AA000 0x00155000    ;# MODER
    mmw 0x58021408 0x002AA000 0x00155000    ;# OSPEEDR
    mmw 0x5802140C 0x00000000 0x003FF000    ;# PUPDR
    mmw 0x58021420 0x99000000 0x66000000    ;# AFRL
    mmw 0x58021424 0x000009AA 0x00000655    ;# AFRH
    # Port G: PG06:AF10:H
    mmw 0x58021800 0x00002000 0x00001000    ;# MODER
    mmw 0x58021808 0x00002000 0x00001000    ;# OSPEEDR
    mmw 0x5802180C 0x00000000 0x00003000    ;# PUPDR
    mmw 0x58021820 0x0A000000 0x05000000    ;# AFRL

    # correct FSIZE is 0x16, however, this causes trouble when
    # reading the last bytes at end of bank in *memory mapped* mode

    # for single flash mode w25q64jv        
                                            ;# 010101010000000000000 0 011000
    mww 0x52005000 0x05500018               ;# QUADSPI_CR: PRESCALER=5, APMS=1, FTHRES=1, FSEL=0, DFM=0, SSHIFT=1, TCEN=1
    mww 0x52005004 0x00160500               ;# QUADSPI_DCR: FSIZE=0x16, CSHT=0x05, CKMODE=0
                                            ;# FSIZE flash的大小。

    mww 0x52005030 0x00001000               ;# QUADSPI_LPTR: deactivate CS after 4096 clocks when FIFO is full
                                            ;# 11010000000000 10 010100000011
    mww 0x52005014 0x0D002503               ;# QUADSPI_CCR: FMODE=0x3, DMODE=0x1, DCYC=0x0, ADSIZE=0x2, ADMODE=0x1, IMODE=0x1
    mmw 0x52005000 0x00000001 0             ;# QUADSPI_CR: EN=1

    # Exit QPI mode
    #mmw 0x52005000 0x00000002 0            ;# QUADSPI_CR: ABORT=1
    #mww 0x52005014 0x000003F5              ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x3, INSTR=Exit QPI
    sleep 1

    # reset flash
    mmw 0x52005000 0x00000002 0             ;# QUADSPI_CR: ABORT=1
    mww 0x52005014 0x00000166               ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=0x66
    mww 0x52005014 0x00000199               ;# QUADSPI_CCR: FMODE=0x0, DMODE=0x0, DCYC=0x0, ADSIZE=0x0, ADMODE=0x0, IMODE=0x1, INSTR=0x99

    # memory-mapped read mode with 3-byte addresses
    mmw 0x52005000 0x00000002 0             ;# QUADSPI_CR: ABORT=1
                                            ;# 11 11 0 00100 00 11 10 11 01 11101011
    mww 0x52005014 0x0F10EDEB               ;# QUADSPI_CCR: FMODE=0x3, DMODE=0x3, DCYC=0x4, ADSIZE=0x2, ADMODE=0x3, IMODE=0x1, INSTR=READ
    ;mww 0x52005014 0x0D002503
}

$_CHIPNAME.cpu0 configure -event reset-init {
    global QUADSPI

    mmw 0x52002000 0x00000004 0x0000000B    ;# FLASH_ACR: 4 WS for 192 MHZ HCLK

    mmw 0x58024400 0x00000001 0x00000018    ;# RCC_CR: HSIDIV=1, HSI on
    mmw 0x58024410 0x10000000 0xEE000007    ;# RCC_CFGR: MCO2=system, MCO2PRE=8, HSI as system clock
    mww 0x58024418 0x00000040               ;# RCC_D1CFGR: D1CPRE=1, D1PPRE=2, HPRE=1
    mww 0x5802441C 0x00000440               ;# RCC_D2CFGR: D2PPRE2=2, D2PPRE1=2
    mww 0x58024420 0x00000040               ;# RCC_D3CFGR: D3PPRE=2
    mww 0x58024428 0x00000040               ;# RCC_PPLCKSELR: DIVM3=0, DIVM2=0, DIVM1=4, PLLSRC=HSI
    mmw 0x5802442C 0x0001000C 0x00000002    ;# RCC_PLLCFGR: PLL1RGE=8MHz to 16MHz, PLL1VCOSEL=wide
    mww 0x58024430 0x01070217               ;# RCC_PLL1DIVR: 192 MHz: DIVR1=2, DIVQ=8, DIVP1=2, DIVN1=24
    mmw 0x58024400 0x01000000 0             ;# RCC_CR: PLL1ON=1
    sleep 1
    mmw 0x58024410 0x00000003 0             ;# RCC_CFGR: PLL1 as system clock
    sleep 1

    adapter speed 24000

    if { $QUADSPI } {
        qspi_init
    }
}

WeActStudio / MiniSTM32H7xx

希望能编写一个openocd初始化QSPI FLASH的脚本 #32