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WorldofKerry
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Python2Verilog
Transpiles a subset of Python functions into synthesizable SystemVerilog.
https://worldofkerry.github.io/Python2Verilog/
GNU General Public License v3.0
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Improved Wait/Ready Signal
#116
Closed
WorldofKerry
closed
1 year ago
WorldofKerry
commented
1 year ago
replaced old ready signal with done signal
replaced wait signal with ready signal (negated)
improved correctness of handling of wait signal
prettified statistics table
removed prints and updated logging
python code now dumped in comment above module