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WorldofKerry / Python2Verilog

Transpiles a subset of Python functions into synthesizable SystemVerilog.
https://worldofkerry.github.io/Python2Verilog/
GNU General Public License v3.0
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Verilog AST should be more tree-like #43

Closed WorldofKerry closed 1 year ago

WorldofKerry commented 1 year ago

Right now none of the "outer" blocks incapsulate what they contain. Mostly due to my poor understanding of what statements/blocks can be in the body of which blocks. Ideally Module, Always, etc. should all have a body field. Class should also inherit a "synthesizable" vs "non-synthesizable" super-class/interface.

WorldofKerry commented 1 year ago

Addressing in #44