While NA4 and NAPOT are the only "naturally aligned" addressing modes in the RISC-V PMP (Privileged) spec, calling their support out by name, and clearly stating that the TOR addressing mode is not supported, can clarify this fact for software / OS developers.
This is a common point of confusion and frustration when porting to new RISC-V chips and so increased visbility of this limitation in the documentation and README might help.
While NA4 and NAPOT are the only "naturally aligned" addressing modes in the RISC-V PMP (Privileged) spec, calling their support out by name, and clearly stating that the TOR addressing mode is not supported, can clarify this fact for software / OS developers.
This is a common point of confusion and frustration when porting to new RISC-V chips and so increased visbility of this limitation in the documentation and README might help.