Closed bombasticbob closed 10 years ago
need to come up with a good default mapping that's mega2560 compatible in the layout.
pins 0-21 are the most important (other than the obvious analog pin mapping). mapping analogs as digitals still problematic if level conversion is being performed.
here are some examples that would work for 0-21:
pin 0 - RX - PD2 pin 1 - TX - PD3 pin 10 - SS - PC4 pin 11 - MOSI - PC5 pin 12 - MISO - PC6 pin 13 - SCK - PC7 pin 14 - TX3 - PF3 pin 15 - RX3 - PF2 pin 16 - TX2 - PE3 pin 17 - RX2 - PE2 pin 18 - TX1 - PC3 pin 19 - RX1 - PC2 pin 20 - SDA - PC0 pin 21 - SCL - PC1
the remaining digital pins would simply 'fill in' as logically as possible.
This maps serial 0-3 as UARTD0, UARTC0, UARTE0, UARTF0 . The remaining 4 UART's could still be mapped to whatever pins they're assigned to, if desired.
closing since Mike's new layout IS compatible. It will be given a new variant name.
The initial pin assignments for the 128a1 do not correspond to the mega 2560 layout. Specifically, the serial port assignments won't necessarily work for Serial1, 2, and 3. It will be necessary to review the pin assignments and configure serial port virtual numbering correctly. Additional serial ports 4 through 7 can be configured 'wherever' so it's less of a problem.