I am currently using Verilator (v5.026) to simulate the OpenC910 core. During the compilation process (make compile), there are a few warnings, one of which is "UNOPTFLAT." This warning appears for approximately 15-20 signals (e.g., hart_ict_read_data_tmp) due to circular combinational logic. Furthermore, when attempting to run the hello_world test case (make runcase CASE=hello_world SIM=verilator DUMP=on), the system's entire 64GB RAM is consumed, resulting in a system hang. Any ideas for resolving this issue?
I am currently using Verilator (v5.026) to simulate the OpenC910 core. During the compilation process (make compile), there are a few warnings, one of which is "UNOPTFLAT." This warning appears for approximately 15-20 signals (e.g., hart_ict_read_data_tmp) due to circular combinational logic. Furthermore, when attempting to run the hello_world test case (make runcase CASE=hello_world SIM=verilator DUMP=on), the system's entire 64GB RAM is consumed, resulting in a system hang. Any ideas for resolving this issue?