This adds support for building the simulation model, linting and running
synthesis of OpenC910 using FuseSoC, as well as making it easier to
integrate in other FuseSoC-based designs.
To test this, first install FuseSoC
pip3 install fusesoc
Create an empty directory, enter it and add openc910 as a library
This adds support for building the simulation model, linting and running synthesis of OpenC910 using FuseSoC, as well as making it easier to integrate in other FuseSoC-based designs.
To test this, first install FuseSoC
pip3 install fusesoc
Create an empty directory, enter it and add openc910 as a library
fusesoc library add openc910 https://github.com/T-head-Semi/openc910
(or if openc910 is already available locally, run)
fusesoc library add openc910 /path/to/openc910/repo
Check that FuseSoC can find the core
fusesoc core list
...and see some basic info...
fusesoc core show openc910
Build the simulation model with the default tool (icarus)
fusesoc run --target=sim openc910
...or with xsim...
fusesoc run --target=sim --tool=xsim openc910
...or Questa/ModelSim...
fusesoc run --target=sim --tool=modelsim openc910
Should hopefully also work with rivierapro, vcs, ncsim etc
Lint the code using Verilator
fusesoc run --target=lint openc910
...or run synthesis with Vivado...
fusesoc run --target=synth openc910
To target a specific part, run e.g. with
fusesoc run --target=synth openc910 --part=xc7a100tcsg324-1
Other synthesis tools have not yet been tested
Signed-off-by: Olof Kindgren olof.kindgren@gmail.com