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Xilinx / ACCL

Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
https://accl.readthedocs.io/
Apache License 2.0
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Update firmware in Xclbin #185

Open Mellich opened 6 months ago

Mellich commented 6 months ago

This may not be directly related to ACCL itself but I found this old script in the test directory which seems like it was used to update the ACCL firmware in an existing bitstream: test/host/debug/update_xclbin_fw.sh

I updated the updatemem call to make it work with my bitstreams and now the script seems to run fine.

updatemem -force --meminfo descriptor.mmi --data $3 --bit bitstream.bit --proc level0_i/ulp/ccl_offload_0/ccl_offload_bd_i/cclo/control/microblaze_0 --out bitstream_updated.bit

However, when I try to program the FPGA with the updated bitstream, XRT will timeout. Did anyone get this working with the recent dev branch or is this updatemem workflow inherently broken (with XRT)?

quetric commented 5 months ago

@Mellich what shell are you targeting? I haven't checked that script for a long time and TBH i don't remember which shell it was written for. The path to the microblaze instance will change for different shells, while the script doesn't check shell version. This might cause the bitstream to become invalid.

Mellich commented 5 months ago

I use the U280 with xilinx_u280_gen3x16_xdma_1_202211_1, Vitis 2022.2, XRT 2.14, and the UDP refdesign . The existing bitstream was synthesized with the same versions. I already modified the path to the microblaze to the path given above based on the output of the extract_mmi script.