This PR attempts to fix two issues, observed when synshteising ACCL with TCP/IP and (vadd, but possibly other) kernels.
The gen_files.py for external DMA by default includes TDEST signals. However, these are not always present (i.e. not present when there is one port as verified by the script bd.tcl).
The kernels lack stream connections to the CCLO. This is solved in a similar way to the DLRM example for OSDI, where the second hostctrl (per CCLO) is removed and those connections are used for the kernels. I am not sure if this causes any change for other applications.
This passes synthesis. I am currently testing PnR and will test on actual hardware in the following days, but the changes here should have no impact on fucntionality.
This PR attempts to fix two issues, observed when synshteising ACCL with TCP/IP and (vadd, but possibly other) kernels.
This passes synthesis. I am currently testing PnR and will test on actual hardware in the following days, but the changes here should have no impact on fucntionality.