Xilinx / PYNQ

Python Productivity for ZYNQ
http://www.pynq.io/
BSD 3-Clause "New" or "Revised" License
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Pynq built image for custom board doesnt boot but it does with another prebuilt image #1296

Closed themachho closed 2 years ago

themachho commented 2 years ago

Hello. Im trying to understand this issue. I have a Zybo Z7-10 that i want to use with the PYNQ framework.

I successfully generated an image with the steps for agnostic board image but when i flash on the sd the board doesnt boot. If instead i use my bootfiles and a pynq prebuilt image for another board it boots but with other issues.

Steps:

  1. Generate a simple base design with vivado 2019.1
  2. Generate the bitstream and my .spec file:
ARCH_Zybo := arm
BSP_Zybo := 
BITSTREAM_Zybo := base/base.bit
STAGE4_PACKAGES_Zybo := pynq ethernet xrt 
FPGA_MANAGER_Zybo := 1
  1. Run setup_host and source petalinux (2019.1)
  2. make PREBUILT=../../bionic.arm.2.5.img BOARDS=Zybo nocheck_images (repo is check out at 2.5 release)
  3. Once the image is completed, i write Zybo-2.5.img (with Etcher) on the sd and place BOOT.bin and image.ub on the first partition of the SD
  4. Connect the board and wait.... The board doesnt start or response to a ping.

On the other hand, i do the follow:

  1. Grab a prebuilt Pynq-Z1-2.5.img and write it (with Etcher) on the SD.
  2. Put the built Zybo BOOT.bin and image.ub on the first partition of the sd card
  3. Boot the board.

The board boots and jupyter is launched, i can access with pynq:9090. The issue here is that when i try to load an overlay i get the following issue:

On the notebook: TimeoutError: [Errno 110] Connection timed out

On dmesg:

[  144.186045] fpga_manager fpga0: writing base.bit.bin to Xilinx Zynq FPGA Manager
[  146.748956] fpga_manager fpga0: Error after writing image data to FPGA
[  146.755174] fpga_manager fpga0: writing base.bit.bin to Xilinx Zynq FPGA Manager
[  149.266907] fpga_manager fpga0: Timeout waiting for PCFG_INIT
[  149.271387] fpga_manager fpga0: Error preparing FPGA for writing

/sys/class/fpga_manager/fpga0 and /dev/xlnk are present but not working. This pynq thread had a similar issue and solved it with a new bitstream but im generating a bitstream also with no success. This xilinx thread had the same issue but was with kernel 4.14 and according to petalinux-config the built kernel is 4.19 and the issue appears to be fixed. They also do:

The way that use to send the ecrypted bitstream to the FPGA is:
echo 0x4 > /sys/class/fpga_manager/fpga0/flags

But sill doesnt work. Is there another way to use an overlay? or to program with usb (vivado) and then access with pyhton?

The strange thing is that the built image with makefile doesnt boot but it boots with another image for other board and my bootfiles. Does anyone have an idea on why the image doesnt boot? or how can i verify why?

schelleg commented 2 years ago

Can you repost this on discuss.pynq.io ... we actively monitor it there...

And if possible, could you upgrade to PYNQ v2.6 as many updates have been made since then.

themachho commented 2 years ago

The image works now. After consulting on the pynq forum the issue was that the board had no IP assigned. After setting it with putty the board boots. Will try to update to v2.6 in the future. Thanks!