Xilinx / PYNQ

Python Productivity for ZYNQ
http://www.pynq.io/
BSD 3-Clause "New" or "Revised" License
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Undeclared class members on line 548 (/lib/video/dma.py) #1407

Closed naru2303 closed 1 year ago

naru2303 commented 1 year ago
mariodruiz commented 1 year ago

@PREDATORNaruz,

I don't think this is a bug. Please post your question in the https://discuss.pynq.io/ forum.

I assume you have not connected the interrupts as described in the documentation https://pynq.readthedocs.io/en/latest/pynq_libraries/interrupt.html

Mario

naru2303 commented 1 year ago

@mariodruiz You're right, on my block design the s2mm and mm2s interrupts of the VMDA goes to the concat block and directly to the PS.... However, after initializing mm2s and s2mm in dma.py (just adding self. = '' to both interrupts) everything worked fine... Do you recommend going through Axi Interrupt Controller like the guide says ? here's a code snipped

         vdma.write(0x00,0x04)
         while vdma.read(0x00) & 0x4 == 4:
              pass

         vdma.write(0x30,0x04)
         while vdma.read(0x30) & 0x4 == 4:
              pass

         vdma.write(0x00,0x93)
         vdma.write(0x5C,addr_inp_buff)
         vdma.write(0x58,widht3)
         vdma.write(0x54,widht3)
         vdma.write(0x50,hight)

         vdma.write(0x30,0x93)
         vdma.write(0xAC,addr_output_buff)
         vdma.write(0xA8,widht)
         vdma.write(0xA4,widht)
         vdma.write(0xA0,hight)

         while vdma.register_map.S2MM_VDMASR.Halted != 1:
             pass
mariodruiz commented 1 year ago

Do you recommend going through Axi Interrupt Controller like the guide says ?

Yes, for more than 1 interrupt, using the interrupt controller is the only way that PYNQ will associate the interrupts.