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Xilinx / PYNQ

Python Productivity for ZYNQ
http://www.pynq.io/
BSD 3-Clause "New" or "Revised" License
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LVDS signals on PYNQ #764

Closed kdpatino closed 5 years ago

kdpatino commented 5 years ago

Hello!

Could you confirm if I can use the PMOD signals with LVDS configuration in the .xdc file?

screenshot from 2018-11-29 14-32-00

I have read in the ZYNQ I/O user manual and there is not clear if I can do it. I appreciate any insight about it.

Thank You!

kdpatino commented 5 years ago

I found the answer, NO the PYNQ board cannot manage LVDS.

screenshot from 2018-11-29 15-20-52

Al of the banks on the board is connected to 3.3V. The Series 7 FPGA cannot manage the LVDS communication with 3.3V in VCOO.

Xilinx answer: https://www.xilinx.com/support/answers/43989.html

Thank You!