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Xilinx / PYNQ_Workshop

BSD 3-Clause "New" or "Revised" License
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pynq z1 dma problem #2

Closed simpsonshrek closed 6 years ago

simpsonshrek commented 6 years ago

Hello, i'm following the DMA tutorial in section 4. The whole flow can work with the bitstream inside the file. However, when i want to reproduce the bitstream file by myself, the whole flow fail. I have follow the block diagram of tutorial, is there anything else i have to set. The following image is my block diagram. default default thanks for your help

bellakate commented 6 years ago

Hello! I have also the same block diagram and facing issue importing overlay. importing overlay shows me some key error in dictionary.Any help will be appreciated

simpsonshrek commented 6 years ago

Maybe you can see this video. I follow these step to import overlay.

https://www.youtube.com/watch?v=Dupyek4NUoI&feature=youtu.be&t=8m13s

cathalmccabe commented 6 years ago

@simpsonshrek you have given no information about how it fails, and no background information about which board you are using, PYNQ image version, Vivaldo tool version etc.

@bellakate it would help if you actually posted the full error, and also provided same information as above.

simpsonshrek commented 6 years ago

I'm using PYNQ Z1 ZYNQ XC7Z020-1CLG400C fpga board, the image file is Pynq-Z1 v2.1 image, the Vivaldo version is 2016.1. As I use the bit stream file, the process of sending data through DMA work like following image. default default If I use the bitstream file generate by myself, the whole process will become like this default default

cathalmccabe commented 6 years ago

This material is based on the PYNQ v2.0 image I'll post an update soon for the v2.2/v2.3 image.

For now, you should check the documentation for the image you are using.

cathalmccabe commented 6 years ago

@simpsonshrek can you post this to the PYNQ support forum with full notebook? http://www.pynq.io/support.html I notice in your design you named the DMAs axi_dma_0 and axi_dma_1 In your code you are using the same labels as the original design (dma_send, dma_recv). Perhaps you have aliased your DMAs, but I expect the issue is something more fundamental and that this is not an issue with this repo. If you can post the full notebook to the support forum, we can follow up there.
I'll close this issue for now.