Closed joyliu37 closed 6 years ago
Hi,
yes you can retarget the device in hls-syn.tcl, in the make-hw.sh script and the make-vivado-proj.tcl. Nonetheless, you're going to need to adapt also the the run-time SW running on the ARM cores, since the implementation is based on the XLNK driver for contiguous memory allocation.
Thanks! I am trying to do the co-sim in HLS and run into the following error. Do you have any idea what's wrong with that?
/home/joey.liu/Work/QNN-MO-PYNQ/qnn/src/library/host/layers.cpp:55:1: error: uninitialized reference member ‘Layers::_network’ [-fpermissive]
In file included from /home/common/tools/Xilinx/Vivado/2017.4/lnx64/tools/gcc/bin/../lib/gcc/x86_64-unknown-linux-gnu/4.6.3/../../../../include/c++/4.6.3/vector:70:0,
from /home/joey.liu/Work/QNN-MO-PYNQ/qnn/src/library/host/layers.h:37,
from /home/joey.liu/Work/QNN-MO-PYNQ/qnn/src/library/host/layers.cpp:32:
/home/common/tools/Xilinx/Vivado/2017.4/lnx64/tools/gcc/bin/../lib/gcc/x86_64-unknown-linux-gnu/4.6.3/../../../../include/c++/4.6.3/bits/vector.tcc: In member function ‘void std::vector<_Tp, _Alloc>::_M_inse
rt_aux(std::vector<_Tp, _Alloc>::iterator, _Args&& ...) [with _Args = {const Layers::Layer&}, _Tp = Layers::Layer, _Alloc = std::allocator
make: [obj/layers.cpp_pre.cpp.tb.o] Error 1 ERROR: [COSIM 212-317] C++ compile error. ERROR: [COSIM 212-321] EXE file generate failed. ERROR: [COSIM 212-321] EXE file generate failed. ERROR: [COSIM 212-331] Aborting co-simulation: C simulation failed, compilation errors. ERROR: [COSIM 212-4] C/RTL co-simulation finished: FAIL *** command 'ap_source' returned error code while executing "source [lindex $::argv 1] " ("uplevel" body line 1) invoked from within "uplevel #0 { source [lindex $::argv 1] } "
Hi,
for performance reasons, the host code embeds features of C++11, which is not completely supported in gcc 4.6.3. You can try to instrument the host code to avoid C++11 non supported features, like the one listed here. Hope this helps.
Um, make sense. Thanks!
I fixed the previous compile problem and run the co-simulation. It seems another problem related to the axi interface pop up. Do you have any idea? Thanks!
/home/joey.liu/Work/QNN-MO-PYNQ/qnn/src/network/output/hls-syn/W1A3/sol1/sim/verilog/AESL_axi_master_hostmem2.v: Read request address 16 exceed AXI master hostmem2 array depth: 1 $finish called at time : 1735 ns : File "/home/joey.liu/Work/QNN-MO-PYNQ/qnn/src/network/output/hls-syn/W1A3/sol1/sim/verilog/AESL_axi_master_hostmem2.v" Line 695
INFO: [Common 17-206] Exiting xsim at Wed Jul 11 11:10:55 2018... ERROR: [COSIM 212-303] Aborting co-simulation: RTL simulation failed. ERROR: [COSIM 212-344] Rtl simulation failed.
Increase the depth of the m_axi to the size of the data moved into the accelerator. You have to increase the depth value in lines 149, 151 and 153 in the top.cpp file.
Hi, I am trying to rebuild this system for other platform, Could I change the device in make-hw.sh script to other device and redo the synthesis?