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Build Customized FPGA Implementations for Vivado
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It's better for `netlist.getTopCellInst().getPortInsts()` to not return empty list. #959

Open zhuguiyuan opened 5 months ago

zhuguiyuan commented 5 months ago
var netlist = EDIFTools.loadEDIFFile(netlistFile);

// The nets contain some portInsts of topCellInst.
netlist.getTopCell().getNets().forEach(n -> System.out
   .println("name: " + n.getName() + " port_insts: " + n.getPortInsts()));

// However, we cannot directly get the portInsts of the top cellInst.
// This method return an empty list.
netlist.getTopCellInst().getPortInsts().forEach(p -> System.out.println(p.getName()));

Since the top cell inst is an EDIFCellInst, it's a better idea to attach its EDIFPortInst onto it.

zhuguiyuan commented 5 months ago

Here is an example:

EDIF File

(edif one_one_detector
  (edifversion 2 0 0)
  (edifLevel 0)
  (keywordmap (keywordlevel 0))
(status
 (written
  (timeStamp 2024 02 13 14 25 56)
  (program "Vivado" (version "2023.2.1"))
  (comment "Built on 'Thu Dec 14 12:24:51 MST 2023'")
  (comment "Built by 'xbuild'")
 )
)
  (Library hdi_primitives
    (edifLevel 0)
    (technology (numberDefinition ))
   (cell BUFG (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port O (direction OUTPUT))
        (port I (direction INPUT))
       )
     )
   )
   (cell IBUF (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port O (direction OUTPUT))
        (port I (direction INPUT))
       )
     )
   )
   (cell GND (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port G (direction OUTPUT))
       )
     )
   )
   (cell VCC (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port P (direction OUTPUT))
       )
     )
   )
   (cell LUT3 (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port O (direction OUTPUT))
        (port I0 (direction INPUT))
        (port I1 (direction INPUT))
        (port I2 (direction INPUT))
       )
     )
   )
   (cell FDRE (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port Q (direction OUTPUT))
        (port C (direction INPUT))
        (port CE (direction INPUT))
        (port D (direction INPUT))
        (port R (direction INPUT))
       )
     )
   )
   (cell LUT2 (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port O (direction OUTPUT))
        (port I0 (direction INPUT))
        (port I1 (direction INPUT))
       )
     )
   )
   (cell OBUF (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface 
        (port O (direction OUTPUT))
        (port I (direction INPUT))
       )
     )
   )
   (cell INV (celltype GENERIC)
     (view netlist (viewtype NETLIST)
       (interface
         (port I (direction INPUT))
         (port O (direction OUTPUT))
       )
     )
   )
  )
  (Library work
    (edifLevel 0)
    (technology (numberDefinition ))
   (cell detector (celltype GENERIC)
     (view detector (viewtype NETLIST)
       (interface 
        (port CLK (direction INPUT))
        (port (rename D_0_ "D[0]") (direction INPUT))
        (port (rename SR_0_ "SR[0]") (direction INPUT))
        (port (rename out_OBUF_0_ "out_OBUF[0]") (direction OUTPUT))
       )
       (contents
         (instance GND (viewref netlist (cellref GND (libraryref hdi_primitives))))
         (instance VCC (viewref netlist (cellref VCC (libraryref hdi_primitives))))
         (instance out0 (viewref netlist (cellref LUT3 (libraryref hdi_primitives)))
           (property INIT (string "8'h40"))
           (property SOFT_HLUTNM (string "soft_lutpair0"))
         )
         (instance out_reg (viewref netlist (cellref FDRE (libraryref hdi_primitives)))
           (property INIT (string "1'b0"))
         )
         (instance (rename state_0__i_1 "state[0]_i_1") (viewref netlist (cellref LUT2 (libraryref hdi_primitives)))
           (property INIT (string "4'hD"))
           (property SOFT_HLUTNM (string "soft_lutpair0"))
         )
         (instance (rename state_reg_0_ "state_reg[0]") (viewref netlist (cellref FDRE (libraryref hdi_primitives)))
           (property INIT (string "1'b0"))
         )
         (instance (rename state_reg_1_ "state_reg[1]") (viewref netlist (cellref FDRE (libraryref hdi_primitives)))
           (property INIT (string "1'b0"))
         )
         (net (rename &_const0_ "<const0>") (joined
          (portref G (instanceref GND))
          (portref R (instanceref out_reg))
          (portref R (instanceref state_reg_0_))
          )
         )
         (net (rename &_const1_ "<const1>") (joined
          (portref CE (instanceref out_reg))
          (portref CE (instanceref state_reg_0_))
          (portref CE (instanceref state_reg_1_))
          (portref P (instanceref VCC))
          )
         )
         (net CLK (joined
          (portref C (instanceref out_reg))
          (portref C (instanceref state_reg_0_))
          (portref C (instanceref state_reg_1_))
          (portref CLK)
          )
         )
         (net (rename D_0_ "D[0]") (joined
          (portref D (instanceref state_reg_1_))
          (portref I0 (instanceref state_0__i_1))
          (portref I2 (instanceref out0))
          (portref D_0_)
          )
         )
         (net (rename SR_0_ "SR[0]") (joined
          (portref I1 (instanceref state_0__i_1))
          (portref R (instanceref state_reg_1_))
          (portref SR_0_)
          )
         )
         (net out0_n_0 (joined
          (portref D (instanceref out_reg))
          (portref O (instanceref out0))
          )
         )
         (net (rename out_OBUF_0_ "out_OBUF[0]") (joined
          (portref Q (instanceref out_reg))
          (portref out_OBUF_0_)
          )
         )
         (net (rename state_0_ "state[0]") (joined
          (portref I0 (instanceref out0))
          (portref Q (instanceref state_reg_0_))
          )
         )
         (net (rename state_0__i_1_n_0 "state[0]_i_1_n_0") (joined
          (portref D (instanceref state_reg_0_))
          (portref O (instanceref state_0__i_1))
          )
         )
         (net (rename state_1_ "state[1]") (joined
          (portref I1 (instanceref out0))
          (portref Q (instanceref state_reg_1_))
          )
         )
       )
     )
   )
   (cell detector_0 (celltype GENERIC)
     (view detector_0 (viewtype NETLIST)
       (interface 
        (port CLK (direction INPUT))
        (port (rename D_0_ "D[0]") (direction INPUT))
        (port (rename SR_0_ "SR[0]") (direction INPUT))
        (port (rename out_OBUF_0_ "out_OBUF[0]") (direction OUTPUT))
       )
       (contents
         (instance GND (viewref netlist (cellref GND (libraryref hdi_primitives))))
         (instance VCC (viewref netlist (cellref VCC (libraryref hdi_primitives))))
         (instance out0 (viewref netlist (cellref LUT3 (libraryref hdi_primitives)))
           (property INIT (string "8'h40"))
           (property SOFT_HLUTNM (string "soft_lutpair1"))
         )
         (instance out_reg (viewref netlist (cellref FDRE (libraryref hdi_primitives)))
           (property INIT (string "1'b0"))
         )
         (instance (rename state_0__i_1 "state[0]_i_1") (viewref netlist (cellref LUT2 (libraryref hdi_primitives)))
           (property INIT (string "4'hD"))
           (property SOFT_HLUTNM (string "soft_lutpair1"))
         )
         (instance (rename state_reg_0_ "state_reg[0]") (viewref netlist (cellref FDRE (libraryref hdi_primitives)))
           (property INIT (string "1'b0"))
         )
         (instance (rename state_reg_1_ "state_reg[1]") (viewref netlist (cellref FDRE (libraryref hdi_primitives)))
           (property INIT (string "1'b0"))
         )
         (net (rename &_const0_ "<const0>") (joined
          (portref G (instanceref GND))
          (portref R (instanceref out_reg))
          (portref R (instanceref state_reg_0_))
          )
         )
         (net (rename &_const1_ "<const1>") (joined
          (portref CE (instanceref out_reg))
          (portref CE (instanceref state_reg_0_))
          (portref CE (instanceref state_reg_1_))
          (portref P (instanceref VCC))
          )
         )
         (net CLK (joined
          (portref C (instanceref out_reg))
          (portref C (instanceref state_reg_0_))
          (portref C (instanceref state_reg_1_))
          (portref CLK)
          )
         )
         (net (rename D_0_ "D[0]") (joined
          (portref D (instanceref state_reg_1_))
          (portref I0 (instanceref state_0__i_1))
          (portref I2 (instanceref out0))
          (portref D_0_)
          )
         )
         (net (rename SR_0_ "SR[0]") (joined
          (portref I1 (instanceref state_0__i_1))
          (portref R (instanceref state_reg_1_))
          (portref SR_0_)
          )
         )
         (net out0_n_0 (joined
          (portref D (instanceref out_reg))
          (portref O (instanceref out0))
          )
         )
         (net (rename out_OBUF_0_ "out_OBUF[0]") (joined
          (portref Q (instanceref out_reg))
          (portref out_OBUF_0_)
          )
         )
         (net (rename state_0_ "state[0]") (joined
          (portref I0 (instanceref out0))
          (portref Q (instanceref state_reg_0_))
          )
         )
         (net (rename state_0__i_1_n_0 "state[0]_i_1_n_0") (joined
          (portref D (instanceref state_reg_0_))
          (portref O (instanceref state_0__i_1))
          )
         )
         (net (rename state_1_ "state[1]") (joined
          (portref I1 (instanceref out0))
          (portref Q (instanceref state_reg_1_))
          )
         )
       )

           (property ORIG_REF_NAME (string "detector"))
     )
   )
   (cell one_one_detector (celltype GENERIC)
     (view one_one_detector (viewtype NETLIST)
       (interface 
        (port clk (direction INPUT))
        (port rst (direction INPUT))
        (port (array (rename in "in[1:0]") 2) (direction INPUT))
        (port (array (rename out "out[1:0]") 2) (direction OUTPUT))
       )
       (contents
         (instance clk_IBUF_BUFG_inst (viewref netlist (cellref BUFG (libraryref hdi_primitives))))
         (instance clk_IBUF_inst (viewref netlist (cellref IBUF (libraryref hdi_primitives))))
         (instance (rename in_IBUF_0__inst "in_IBUF[0]_inst") (viewref netlist (cellref IBUF (libraryref hdi_primitives))))
         (instance (rename in_IBUF_1__inst "in_IBUF[1]_inst") (viewref netlist (cellref IBUF (libraryref hdi_primitives))))
         (instance inst0 (viewref detector (cellref detector (libraryref work))))
         (instance inst1 (viewref detector_0 (cellref detector_0 (libraryref work))))
         (instance (rename out_OBUF_0__inst "out_OBUF[0]_inst") (viewref netlist (cellref OBUF (libraryref hdi_primitives))))
         (instance (rename out_OBUF_1__inst "out_OBUF[1]_inst") (viewref netlist (cellref OBUF (libraryref hdi_primitives))))
         (instance rst_IBUF_inst (viewref netlist (cellref IBUF (libraryref hdi_primitives))))
         (net clk (joined
          (portref I (instanceref clk_IBUF_inst))
          (portref clk)
          )
         )
         (net clk_IBUF (joined
          (portref I (instanceref clk_IBUF_BUFG_inst))
          (portref O (instanceref clk_IBUF_inst))
          )
         )
         (net clk_IBUF_BUFG (joined
          (portref CLK (instanceref inst0))
          (portref CLK (instanceref inst1))
          (portref O (instanceref clk_IBUF_BUFG_inst))
          )
         )
         (net (rename in_0_ "in[0]") (joined
          (portref I (instanceref in_IBUF_0__inst))
          (portref (member in 1))
          )
         )
         (net (rename in_1_ "in[1]") (joined
          (portref I (instanceref in_IBUF_1__inst))
          (portref (member in 0))
          )
         )
         (net (rename in_IBUF_0_ "in_IBUF[0]") (joined
          (portref D_0_ (instanceref inst0))
          (portref O (instanceref in_IBUF_0__inst))
          )
         )
         (net (rename in_IBUF_1_ "in_IBUF[1]") (joined
          (portref D_0_ (instanceref inst1))
          (portref O (instanceref in_IBUF_1__inst))
          )
         )
         (net (rename out_0_ "out[0]") (joined
          (portref O (instanceref out_OBUF_0__inst))
          (portref (member out 1))
          )
         )
         (net (rename out_1_ "out[1]") (joined
          (portref O (instanceref out_OBUF_1__inst))
          (portref (member out 0))
          )
         )
         (net (rename out_OBUF_0_ "out_OBUF[0]") (joined
          (portref I (instanceref out_OBUF_0__inst))
          (portref out_OBUF_0_ (instanceref inst0))
          )
         )
         (net (rename out_OBUF_1_ "out_OBUF[1]") (joined
          (portref I (instanceref out_OBUF_1__inst))
          (portref out_OBUF_0_ (instanceref inst1))
          )
         )
         (net rst (joined
          (portref I (instanceref rst_IBUF_inst))
          (portref rst)
          )
         )
         (net rst_IBUF (joined
          (portref O (instanceref rst_IBUF_inst))
          (portref SR_0_ (instanceref inst0))
          (portref SR_0_ (instanceref inst1))
          )
         )
       )
     )
   )
  )
(comment "Reference To The Cell Of Highest Level")

  (design one_one_detector
    (cellref one_one_detector (libraryref work))
    (property XLNX_PROJ_DIR (string "C:/Users/95162/Desktop/DUT/one_one_detector"))
    (property part (string "xc7z020clg400-1"))
  )
)

Java File

    var netlist = EDIFTools.loadEDIFFile(netlistFile);
    netlist.getTopCell().getNets().forEach(n -> System.out
        .println("name: " + n.getName() + " port_insts: " + n.getPortInsts()));
    System.out.println(netlist.getTopCellInst().getPortInsts().size());

Output:

name: clk port_insts: [clk, clk_IBUF_inst/I]
name: in_IBUF[0] port_insts: [in_IBUF[0]_inst/O, inst0/D[0]]
name: clk_IBUF_BUFG port_insts: [clk_IBUF_BUFG_inst/O, inst0/CLK, inst1/CLK]
name: out[1] port_insts: [out[1], out_OBUF[1]_inst/O]
name: out[0] port_insts: [out[0], out_OBUF[0]_inst/O]
name: clk_IBUF port_insts: [clk_IBUF_BUFG_inst/I, clk_IBUF_inst/O]
name: in_IBUF[1] port_insts: [in_IBUF[1]_inst/O, inst1/D[0]]
name: rst port_insts: [rst, rst_IBUF_inst/I]
name: out_OBUF[0] port_insts: [inst0/out_OBUF[0], out_OBUF[0]_inst/I]
name: out_OBUF[1] port_insts: [inst1/out_OBUF[0], out_OBUF[1]_inst/I]
name: rst_IBUF port_insts: [inst0/SR[0], inst1/SR[0], rst_IBUF_inst/O]
name: in[0] port_insts: [in[0], in_IBUF[0]_inst/I]
name: in[1] port_insts: [in[1], in_IBUF[1]_inst/I]
0
clavin-xlnx commented 5 months ago

Thank you for the post and example. However, I am not sure if I agree with the need to attach EDIFPortInst objects to the top EDIFCellInst. The top instance is a special case and is only present to instantiate the design. It has no outer context and doesn't connect to anything larger than itself. The top cell can have internal facing EDIFPortInst objects connecting to its internal nets, but that would not be present on the top instance.

Can you share more about your use case on what you are trying to accomplish? Perhaps we can help in another way.