Closed saitej25 closed 5 years ago
I believe the DDR4 memory is used for communication with OpenCL kernel. How can I get a AXI-Master MM to connect to RTL Kernel without disturbing OpenCL space
hi @saitej25 , Please post such queries to SDx Forum for quick response from Xilinx Expert: https://forums.xilinx.com/t5/SDAccel/bd-p/SDx
-Heera
I believe the DDR4 memory is used for communication with OpenCL kernel. How can I get a AXI-Master MM to connect to RTL Kernel without disturbing OpenCL space