Xilinx / SDAccel_Examples

SDAccel Examples
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hbm_bandwidth on U280 error design does not meet timing #58

Closed smosanu closed 4 years ago

smosanu commented 4 years ago

Building the hbm_bandwidth example, either as is, with 8 CU, or with only 2 CU, seems to fail to meet timing on the Alveo U280 accelerator card using SDAccel 2019.1. The log file is provided below. Perhaps this happens because I am using an ES1 device? The hbm_simple example worked with no issues though. runme.log

Please advice. Thank you!

smosanu commented 4 years ago

Based on XOCC docs the clock uncertainty can be adjusted with the option: --xp prop:solution.kernel_compiler_margin=0.1 Appending this option to CLFLAGS in the makefile fixed the problem.