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Xilinx / Vitis-AI

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
https://www.xilinx.com/ai
Apache License 2.0
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DPUCZDX8G_ISA0_B4096_MAX_BG2 Specifications #657

Closed almidi closed 2 years ago

almidi commented 2 years ago

Greetings. I am using the 'xilinx-zcu102-dpu-v2020.2-v1.3.0.img.gz' image provided in the 'Vitis AI User Guide' and it works well. However, I am trying to get the exact configuration of the DPU and cant seem to find anything in the documentation.

The target platform used by xilinx compiler is 'DPUCZDX8G_ISA0_B4096_MAX_BG2'. I managed to conclude that the IP is using the 'B4096' architecture (from the name) and 4 cores (using xdputil query).

I would like to figure out more about the enabled features of the default image, like RAM usage, Channel augmentation, Depthwise Conv, Softmax etc..

qianglin-xlnx commented 2 years ago

Hi @Almidi You can check the 'DPUCZDX8G_ISA0_B4096_MAX_BG2' information in https://github.com/Xilinx/Vitis-AI/blob/master/tools/Vitis-AI-Runtime/VART/target_factory/targets/DPUCZDX8G_ISA0_B4096_MAX_BG2.prototxt

qianglin-xlnx commented 2 years ago

Hi @Almidi Since we haven't received your reply for a long time, we assume you have solved this issue and I'm going to close it. If you still have any questions, please feel free to reopen it. Thank you very much.