search

Xilinx / Vitis-AI

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
https://www.xilinx.com/ai
Apache License 2.0
1.45k stars 626 forks source link

DPU model size doesn't match my yolov4 input #689

Closed charles-str closed 2 years ago

charles-str commented 2 years ago

I train yolov4-tiny with darknet, after quantize and compiled, I run it on ZCU104 , my input size is 608608, why get 152152 size this is error

[ WARN:0] global /usr/src/debug/opencv/4.4.0-r0/git/modules/videoio/src/cap_gstreamer.cpp (935) open OpenCV | GStreamer warning: Cannot query video position: status=1, value=-1, duration=1202 WARNING: Logging before InitGoogleLogging() is written to STDERR I0426 11:54:54.262604 1428 demo.hpp:744] DPU model size=152x152 I0426 11:54:54.300854 1428 demo.hpp:744] DPU model size=152x152 I0426 11:54:54.334166 1428 demo.hpp:744] DPU model size=152x152 I0426 11:54:54.366963 1428 demo.hpp:744] DPU model size=152x152 Segmentation fault

qianglin-xlnx commented 2 years ago

Hi @charles-str You can use xdputil tool to check the model input and output first, as shown below. image

charles-str commented 2 years ago

Hi @charles-str You can use xdputil tool to check the model input and output first, as shown below. image

thanks , I try it later

charles-str commented 2 years ago

Hi @charles-str You can use xdputil tool to check the model input and output first, as shown below. image

Thanks for your reply yesterday, I use xdputil tool to check the model input and output, the input and output are wrong, maybe it occured in the compiled process, but it didn't report any errors。

this is the model input and output: Screenshot from 2022-03-03 10-45-07

this is the compiled information: Screenshot from 2022-03-03 10-44-30 Screenshot from 2022-03-03 10-46-41

qianglin-xlnx commented 2 years ago

Hi @charles-str Your model is based on TF1? If yes, you can specify the input tensor shape with an extra option like --options '{"input_shape": "1,224,224,3"}' when you compile the model.

And one more thing, from the your comping log, you need to set the alpha value in leaky-relu from 0.1 to 0.101562. Thus, it will be assigned to DPU side.

charles-str commented 2 years ago

Hi @charles-str Your model is based on TF1? If yes, you can specify the input tensor shape with an extra option like --options '{"input_shape": "1,224,224,3"}' when you compile the model.

And one more thing, from the your comping log, you need to set the alpha value in leaky-relu from 0.1 to 0.101562. Thus, it will be assigned to DPU side. I train yolov4-tiny with darknet, then convert it to caffe

charles-str commented 2 years ago

Hi @qianglin-xlnx , I change leaky-relu alpha value 0.101562, it has same comping log, it seems very strange, and the input size still is not the first layer. Screenshot from 2022-03-03 14-50-16

wanghong4compiler commented 2 years ago

Hi @charles-str , could you share the model file, so that I can reproduce this issue? thank you ~

charles-str commented 2 years ago

@qianglin-xlnx @wanghong4compiler
I change the activation function from leaky-relu to relu, the input size is correct finally, thanks for yours enthusiasm, next I will test the performance.

charles-str commented 2 years ago

@qianglin-xlnx @wanghong4compiler

I met another question, after my yolov4-tiny compiled, although the input size is correct, it has many graphs. But the demo of yolov4, it has only one graph.

Screenshot from 2022-03-03 16-27-27 Screenshot from 2022-03-03 16-30-26

wanghong4compiler commented 2 years ago

Hi @charles-str Is there any warning on your screen? or could you dump the svg of the model?

charles-str commented 2 years ago

Hi @charles-str Is there any warning on your screen? or could you dump the svg of the model?

this is the svg of the yolov4-tiny model. test

wanghong4compiler commented 2 years ago

Hi @charles-str , If the strided_slice is shape-related or is the component of a coarse-grained operation, it would be removed. Otherwise, the strided_slice would be compiled into CPU implementations. It seems like, in your model, it can't be removed, and assigned to CPU.

charles-str commented 2 years ago

Hi @charles-str , If the strided_slice is shape-related or is the component of a coarse-grained operation, it would be removed. Otherwise, the strided_slice would be compiled into CPU implementations. It seems like, in your model, it can't be removed, and assigned to CPU.

thanks, what sholud I do? need I retrain the yolov4-tiny model with replacing strided_slice ? so that it can be supported by dpu. Do you have any other advise?

wanghong4compiler commented 2 years ago

Hi @charles-str ， the replacement may be a convenient way to resolve this issue.

qianglin-xlnx commented 2 years ago

Hi @charles-str It seems that we can close this issue. If you have further problems, please feel free to reopen it. Thank you.

vandenplas9a commented 2 years ago

Hi @charles-str Is there any warning on your screen? or could you dump the svg of the model?

I'm getting a similar error - how do I fix it?

vandenplas9a commented 2 years ago

I have exactly the same issue using running

https://github.com/Xilinx/Vitis-AI-Tutorials/blob/1.4/Design_Tutorials/07-yolov4-tutorial/readme.md

selection 3

How do I fixed it?

Hi @charles-str Your model is based on TF1? If yes, you can specify the input tensor shape with an extra option like --options '{"input_shape": "1,224,224,3"}' when you compile the model.

And one more thing, from the your comping log, you need to set the alpha value in leaky-relu from 0.1 to 0.101562. Thus, it will be assigned to DPU side.