vitis kernel hanging at cl:finish();/q.finish() on hardware.

[nikhil2k10]

Hi,

I am using iwave's zu19eg development kit, I was trying to implement the vitis based designs on hardware. I started with basic vector_add code. When i am running the code on the hardware it is hanging at cl:finish();/q.finish().

Can anyone help me to resolve the issue?

@imrickysu @sgrace-xlnx @dharapxilinx @xlinx-dachang

[imrickysu]

Hi @nikhil2k10 , I assume you need to create a Vitis platform for your development kit. Some issue may occur during your customization.

Hanging at cl:finish();/q.finish() may relate to the interrupt signal issue, or device tree for interrupt mapping.

Since this issue is not directly caused by tutorials, I'll close this issue and suggest you ask this question on Xilinx forums. https://forums.xilinx.com/ and share the link here. There are more people supporting the Xilinx forums. We can also follow up on the forums.

[nikhil2k10]

Hi @imrickysu ,

Thanks for you comments. will check the interrupts signals, if there is any issue while building the device tree. Also , I have raised a question in the forums. I am sharing the link below.

https://support.xilinx.com/s/question/0D54U000061gSB2SAM/vitis-kernel-hanging-at-clfinish-on-hardware?language=en_US

[nikhil2k10]

Hi @imrickysu ,

I am attaching my device tree file here, Can you please help me find the issue in device tree?

Also, I am using iwave's zu19eg development kit.

system_user_dtsi.txt

[imrickysu]

Hi @nikhil2k10 , line 280 interrupt-parent = <&axi_intc_0>; is commented out. It's needed for zyxclmm_drm. You need to find out the interrupt controller node name in your design (check other dts and dtsi files) and replace "axi_intc_0".

[nikhil2k10]

Hi @imrickysu , I have uncommented the line 280, in my xsa also the naming is same "axi_intc_0" for the interrupt controller. But while building petalinux, it is giving error that "axi_intc_0" node is not present.

can you please share if you have any other designs that i could refer.

[imrickysu]

Hi @nikhil2k10 , this line tells ZOCL driver which interrupt it should use.

The ZCU104 platform example writes this node because in the hardware XSA, the interrupt controller is called axi_intc_0 https://github.com/Xilinx/Vitis-Tutorials/blob/2022.2/Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step1_vivado/system_step1.tcl#L210

If your interrupt node is not called this name, you need to modify the name accordingly.

Besides, the createdts command can help to generate the ZOCL zyxclmm_drm node. You can refer to the command here https://github.com/Xilinx/Vitis-Tutorials/blob/2022.2/Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step2_pfm/Makefile#L62 and https://github.com/Xilinx/Vitis-Tutorials/blob/2022.2/Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/step2.md#create-the-device-tree-file