Open LiShuang-codes opened 7 months ago
Hi @LiShuang-codes ! I got exactly the same result here. And when I xbutil validate
, the validation all passed, so it's very weird.
Any new findings?
After taking a closer look, XRT couldn't read my .xclbin
because it fails at xrt_xclbin_parse_header, where the even magic byte is defined here.
May I ask why is it hardcoded as 0xf
? Is there any relevant spec/documentation I can refer to? I'm pretty new to Xilinx and I'm having a difficult time to find adequate resource for fixing this. But I have been referring to this UltraScale doc, where it mentions:
The FPGA reads the bitstream header to determine the flash read option selected for reading the configuration data.
Not sure if they refer to the same "bitstream header"..
Any insight would be immensely appreciated! Apologize in advance if I'm tagging the wrong person @stsoe , I just came across several issues/PRs where you reviewed them really versedly so I thought you might have some clue to point us :)
Hi @jiahanxie353 . I am surprised that documentation isn't more clear about what is required to run in emulation mode. You must set XCL_EMULATION_MODE=sw_emu | hw_emu
in the shell where you run the test. In your case I would expect this to work
env XCL_EMULATION_MODE=sw_emu ./fp.exe -k addone.xclbin
Not obvious, I agree, and poor error message.
Thanks so much for your swift response @stsoe ! That solves the issue! I did set the environment variable but Python somehow didn't update its os.env
.. now I'm forcing to update it. Thanks again!
Hello! I run the XRT/test/xrt/13_add_one example. It runs smooothly in hw type. BUT not in sw_emu type. Idont know why. I use v++ to compile cl kernel to xo file and link it to xclbin file in sw_emu type. The source code is in XRT/test/xrt/13_add_one, the host compile command is
the kernel compile command is
Finally, I run this command to start program
Output:
Dmesg display:
These information maybe help.