Xilinx / dma_ip_drivers

Xilinx QDMA IP Drivers
https://xilinx.github.io/dma_ip_drivers/
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For the XDMA driver, how to write non-contiguous memory blocks on the HOST side into an SG list (multiple table entries), and then write them to the FPGA through the XDMA driver? #297

Open robert987-dev opened 1 month ago

robert987-dev commented 1 month ago

For the XDMA driver, how to write non-contiguous memory blocks on the HOST side into an SG list (multiple table entries), and then write them to the FPGA through the XDMA driver?

For example, I allocate non-contiguous memory blocks on the host side:

// Total data size
size_t total_size = STREAM_SIZE * SEQUENCE_NUMBER * BATCH_SIZE * sizeof(float);
size_t num_blocks = total_size / BLOCK_SIZE; // Total number of blocks
printf("num_blocks: %d \n", num_blocks);

// Allocate an array to store block pointers
hostDataBlocks = (float**)malloc(num_blocks * sizeof(float*));
if (!hostDataBlocks) {
    perror("malloc");
    return -1;
}

// Allocate non-contiguous memory blocks
for (size_t i = 0; i < num_blocks; ++i) {
    cudaStatus = cudaHostAlloc((void**)&hostDataBlocks[i], BLOCK_SIZE, cudaHostAllocDefault);
    if (cudaStatus != cudaSuccess) {
        std::cerr << "cudaHostAlloc failed: " << cudaGetErrorString(cudaStatus) << std::endl;
        return -1;
    }
}

How to use the XDMA driver to write hostDataBlocks into the DMA using SG mode?