Xilinx / embeddedsw

Xilinx Embedded Software (embeddedsw) Development
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Need to patch embeddedsw/lib/sw_apps/zynq_fsbl/src/main.c (OutputStatus function) #12

Open kayws426 opened 7 years ago

kayws426 commented 7 years ago
 void OutputStatus(u32 State)
 {
 #ifdef STDOUT_BASEADDRESS
-#ifdef XPAR_XUARTPS_0_BASEADDR
+#if defined(XPAR_XUARTPS_0_BASEADDR) && (STDOUT_BASEADDRESS == XPAR_XUARTPS_0_BASEADDR)
    u32 UartReg = 0;
 #endif

    fsbl_printf(DEBUG_GENERAL,"FSBL Status = 0x%.4lx\r\n", State);
    /*
     * The TX buffer needs to be flushed out
     * If this is not done some of the prints will not appear on the
     * serial output
     */
-#ifdef XPAR_XUARTPS_0_BASEADDR
-   UartReg = Xil_In32(STDOUT_BASEADDRESS + XUARTPS_SR_OFFSET);
+#if defined(XPAR_XUARTPS_0_BASEADDR) && (STDOUT_BASEADDRESS == XPAR_XUARTPS_0_BASEADDR)
+   UartReg = Xil_In32(XPAR_XUARTPS_0_BASEADDR + XUARTPS_SR_OFFSET);
    while ((UartReg & XUARTPS_SR_TXEMPTY) != XUARTPS_SR_TXEMPTY) {
-       UartReg = Xil_In32(STDOUT_BASEADDRESS + XUARTPS_SR_OFFSET);
+       UartReg = Xil_In32(XPAR_XUARTPS_0_BASEADDR + XUARTPS_SR_OFFSET);
    }
 #endif
 #endif
 }

thank you.

kayws426 commented 1 year ago

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