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Xilinx / finn-examples

Dataflow QNN inference accelerator examples on FPGAs
BSD 3-Clause "New" or "Revised" License
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rename the VGG10 bitstream to match models.py #58

Closed fionnodonohoe-xlnx closed 1 year ago

fionnodonohoe-xlnx commented 1 year ago

This is needed so that https://github.com/Xilinx/finn-examples/blob/main/finn_examples/notebooks/5_radioml_with_cnns.ipynb can retrieve the equivalent built bitstream (not the released bitstream) from here: https://github.com/Xilinx/finn-examples/blob/c75c1168b84a3e40b6ce68fc8ac6aef99fab81f3/finn_examples/models.py#L338

mmrahorovic commented 1 year ago

Thanks! :)