Adds support for utilizing multi-packed DSP58s for the 'VectorVectorActivation' layer. For weights and activations that are between 4- and 8-bits wide (with the exception of 9-bits for activations for DSP58), the custom layer packs 2, 3 or 4 elements on the input datapath of the DSP to achieve 3 MACs per cycle per DSP58.
Functionalities to be added for the VVU
[x] rtllib: RTL implementation for the DSP58-based VVU
[x] See mvu_vvu_8sx9_dsp58
[x] Custom-op for the new RTL component: see vectorvectoractivation_rtl.py
[x] Code geneneration
[x] IP-stitching
[x] Resource estimations
[x] Cycle estimations
[x] Transformation to instantiate the newly created custom-op: see specialize_layers.py
Tests
[x] FINN unit test -- test for the VVU custom-op & transformation (node-by-node CPPsim, node-by-node RTLsim, stitched-ip RTLsim): see test_fpgadataflow_vvau_rtl under test_fpgadataflow_vvau.py
[x] RTL testbench: vvu_axi_tb.sv
Outstanding bugs & features
[x] Implement stream re-arrangement in the RTL-SWG followed by a regular (i.e. already supported) StreamingDataWidthConverter_Batch layer. This removes the need for introducing a new layer type. (resolved in PR #922)
(PR combines the previously closed PRs: PR https://github.com/Xilinx/finn/pull/976 , PR https://github.com/Xilinx/finn/pull/975 and PR https://github.com/Xilinx/finn/pull/794)
Adds support for utilizing multi-packed DSP58s for the 'VectorVectorActivation' layer. For weights and activations that are between 4- and 8-bits wide (with the exception of 9-bits for activations for DSP58), the custom layer packs 2, 3 or 4 elements on the input datapath of the DSP to achieve 3 MACs per cycle per DSP58.
Functionalities to be added for the VVU
rtllib: RTL implementation for the DSP58-based VVUmvu_vvu_8sx9_dsp58vectorvectoractivation_rtl.pyspecialize_layers.pyTests
test_fpgadataflow_vvau_rtlundertest_fpgadataflow_vvau.pyvvu_axi_tb.svOutstanding bugs & features
StreamingDataWidthConverter_Batchlayer. This removes the need for introducing a new layer type. (resolved in PR #922)