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Xilinx
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finn
Dataflow compiler for QNN inference on FPGAs
https://xilinx.github.io/finn
BSD 3-Clause "New" or "Revised" License
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Release merge for v0.10.1
#1123
Closed
auphelia
closed
3 months ago
auphelia
commented
3 months ago
This release contains
Fix for FIFO sizing, see issue
https://github.com/Xilinx/finn/issues/998
Independent input and threshold precision and resource efficient per tensor quantization with RTL Thresholding
Select specific DSP48 (version 1 or version 2) depending on target device for RTL MVU
Extend resource estimation to take fpga part as argument and improved post synthesis resource reporting (
https://github.com/Xilinx/finn/pull/965
)
Fix for data packing in rtlsim (
https://github.com/Xilinx/finn/pull/1080
)
cpp helper functions for numpy to hls::vector conversion (
https://github.com/Xilinx/finn/pull/1047
)
Smaller bugfixes, like calling the correct .onnx file in Brevitas export tutorial (
https://github.com/Xilinx/finn/pull/1053
)
This release contains