[RapidWright] Pull in PhysNetlistWriter + RWRoute fixes

[eddieh-xlnx]

Notably, pulling in:

• https://github.com/Xilinx/RapidWright/pull/928 and https://github.com/Xilinx/RapidWright/pull/929 Fixes various FPGAIF issues with stubs incorrectly appearing on static nets
• https://github.com/Xilinx/RapidWright/pull/927 Fixes an issue with FPGAIF nets associated with differential IOs
• https://github.com/Xilinx/RapidWright/pull/924 Fixes an issue when RWRoute's LUT pin swapping feature is enabled
• https://github.com/Xilinx/RapidWright/pull/923 Fixes an issue where intra-site static routing was being dropped in FPGAIF
• https://github.com/Xilinx/RapidWright/pull/921 Small bugfix in RWRoute which should slightly improve performance

The fixes in https://github.com/Xilinx/RapidWright/pull/928 & https://github.com/Xilinx/RapidWright/pull/929, https://github.com/Xilinx/RapidWright/pull/927 and https://github.com/Xilinx/RapidWright/pull/923 means that an updated set of benchmarks are needed, so this PR temporarily switches over to a staging URL too for the sake of testing.

Note that contestants will need to re-run the DcpToFpgaIF utility on any private benchmarks they may have in order to enjoy the benefits of these fixes too.