search

Xilinx / fpga24_routing_contest

Runtime-First FPGA Interchange Routing Contest @ FPGA’24
https://xilinx.github.io/fpga24_routing_contest/
Other
31 stars 10 forks source link

Add DiffPhysNetlist utility #66

Closed eddieh-xlnx closed 9 months ago

eddieh-xlnx commented 9 months ago

Contest rules stipulate that the intra-site routing and placement of the input physical netlist cannot be modified (only inter-site routing/PIPs may be inserted). This is now verified by CheckPhysNetlist as of https://github.com/Xilinx/fpga24_routing_contest/pull/64.

This new DiffPhysNetlist utility provides a more detailed report for any diffs found, and can be used like so:

./gradlew -Dmain=com.xilinx.fpga24_routing_contest.DiffPhysNetlist :run --args="boom_soc_routed.phys boom_soc_unrouted.phys"