Post final submission cleanup

Xilinx / fpga24_routing_contest

Runtime-First FPGA Interchange Routing Contest @ FPGA’24

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Closed eddieh-xlnx closed 8 months ago

eddieh-xlnx commented 8 months ago

Now that final submissions are in, let's clean things up:

Improve CI to first package, before unpacking and running the test-container recipe
Parse the User-CPU time result and display as part of compute-score.py(values continue to not be used for scoring)
Update website, add more acknowledgements