Open GTwhy opened 1 year ago
Hi GTwhy,
Here is an example for the xdma.
There is also an example in systemctlm-cosim-demo that uses the QDMA in a SystemC simulation. In case you would like to connect verilated RTL you can use the TLM bridges similar to what was done with the xdma example above.
Best regards, Francisco Iglesias
Hi Francisco Iglesias,
Thanks for your response! I have looked at the examples you provided. However, when I read the code of xdma(xdma.h
, xdma_rtl.h
), I found that it did not implement the function of DMA based on descriptors.
I have discovered that qdma.h
implements DMA functionality and can be controlled as a QDMA device through the driver, as demonstrated by the systemct1m-cosim-demo
. But I am uncertain if the qdma model implementation is complete or if it can replace Xilinx's QDMA IP Core. I am not very familiar with qdma and I am trying this demo. I would like to hear your opinion on the completeness of this model if you are familiar with it.
Our user logic is open source and we would like to use the qdma model instead of Xilinx's IP Core to connect our user logic during simulation. This would allow us to accelerate the simulation process and use the entire open source toolchain in github action CI, while avoiding the issue of Verilator being unable to run encrypted IP Cores.
Thank you for your help, and have a nice day!
Hi! I'm trying to use this lib for some co-simulation works but I have some questions about its feasibility for my use case.
We have user logic based on XDMA and QDMA, but Xilinx's IP Core is encrypted and can't be simulated with verilator. However, I see that this lib has software interfaces for XDMA and QDMA, so I'm wondering if we can connect our user logic to these software interfaces for simulation purposes? I'm not sure if this is feasible or if there are any potential issues to be aware of. Thank you very much!