Closed IvoBrandao closed 9 months ago
Hi @IvoBrandao ,
Looks like UG1400 needs to be updated with rm-hw options.
I don't see anything wrong with your instructions.
Can you check if you have these params enabled in your vivado tool or vivado init tcl?
set_param bitstream.enableMetaData 1
set_param platform.enableStaticAndPartitionXSAs 1
Below is the commands I used to generate the xsa for DFx design.
Versal:
write_hw_platform -fixed -static ./vck190_pl_demo/output/vck190_pl_demo_static.xsa -force
write_hw_platform -fixed -rp vck190_pl_demo_i/rp1 -rm rp1rm1_inst_0 ./vck190_pl_demo/output/vck190_pl_demo_rp1rm1_dipsw.xsa -force
write_hw_platform -fixed -rp vck190_pl_demo_i/rp2 -rm rp2rm1_inst_0 ./vck190_pl_demo/output/vck190_pl_demo_rp2rm1_pb.xsa -force
write_hw_platform -fixed -rp vck190_pl_demo_i/rp3 -rm rp3rm1_inst_0 ./vck190_pl_demo/output/vck190_pl_demo_rp3rm1_led.xsa -force
ZynqMP:
write_hw_platform -hw -include_bit -fixed -static -file ./dfx/zynqmp/project_1/output/zcu102_pl_demo_dfx_static.xsa -force
write_hw_platform -hw -include_bit -fixed -rp zcu102_pl_demo_i/rp1 ./dfx/zynqmp/project_1/output/zcu102_pl_demo_dfx_rp1.xsa -force
Thanks, Sandeep
Hi @grsandeep85,
Thanks for the fast answer. Indeed the flags you mentioned are not set in my project.
I tried to set them and then create the XSA
as you recommended. The commands I used are the following:
set_param bitstream.enableMetaData 1
set_param platform.enableStaticAndPartitionXSAs 1
open_run impl_1
write_hw_platform -hw -include_bit -fixed -static -file system_static.xsa -force
write_hw_platform -hw -include_bit -fixed -rp system_i/rp -file system_rp_rm1.xsa -force
close_design
open_run impl1_rm2
write_hw_platform -hw -include_bit -fixed -rp system_i/rp -file system_rp_rm2.xsa -force
close_design
After that, I created the 3 applications in Petalinux:
petalinux-create -t apps --template dfx_dtg_zynqmp_static -n staticapp --enable --srcuri "system_static.xsa"
petalinux-create -t apps --template dfx_dtg_zynqmp_partial -n rm1app --enable --srcuri "system_rp_rm1.xsa" --static-pn staticapp
petalinux-create -t apps --template dfx_dtg_zynqmp_partial -n rm2app --enable --srcuri "system_rp_rm2.xsa" --static-pn staticapp
Petalinux-build
I see that the application was deployed correctly:
xilinx-kv260-starterkit-20232:~$ tree /lib/firmware/
/lib/firmware/
|-- al5d.fw
|-- al5d_b.fw
|-- al5e.fw
|-- al5e_b.fw
|-- k26-starter-kits.dtbo
`-- xilinx
|-- k26-starter-kits
| |-- k26-starter-kits.bit.bin
| |-- k26-starter-kits.dtbo
| `-- shell.json
`-- staticapp
|-- rm1app
| |-- rm1app.bit
| `-- rm1app.dtbo
|-- rm2app
| |-- rm2app.bit
| `-- rm2app.dtbo
|-- staticapp.bit.bin
`-- staticapp.dtbo
I also have confirmed that setting the two flags and exporting the XSA
as I exported it before is the cause for the error. I had exported the XSA
for the reconfigurable regions as follows:
open_run impl_1
write_hw_platform -include_bit -rp {system_i/rp} -rm {rm1_inst_0} system_rp_rm1.xsa -force
close_design
open_run impl_1_rm2
write_hw_platform -include_bit -rp {system_i/rp} -rm {rm2_inst_0} system_rp_rm2.xsa -force
close_design
will generate the following error, even with the two flags set.
| The rm xsa given "/build/tmp/work/xilinx_k26_kv-xilinx-linux/rm1app/1.0-r0/system_rp_rm1.xsa" is not valid for the given static XSA: "/build/tmp/work/xilinx_k26_kv-xilinx-linux/rm1app/1.0-r0/recipe-sysroot/xsa/staticapp.xsa"
| while executing
| "builtin_platform {*}$saved_args"
| (procedure "platform" line 367)
| invoked from within
| "platform create -name $params(hwpname) -hw $params(hdf) -rm-hw $params(rphdf) -os device_tree -proc $processor -no-boot-bsp -out $params(ws)"
| invoked from within
| "if { $params(ws) ne "" } {
| # Local Work Space available
| if { $params(pname) ne "" } {
| # hwpname/bspname is empty then default it to pname+_hwproj/..."
| (file "build/tmp/work/xilinx_k26_kv-xilinx-linux/rm1app/1.0-r0/dtgen_dfx.tcl" line 109)
The only question I have remaining, is if the rm1app.bit
shouldn't have been converted to bit.bin
?
Note: I ask this because in the ZynqMP PL Programming page the reconfigurable modules are always shown as converted to
bin
.
Thanks for the help provided up to now.
Hi @IvoBrandao,
Glad you have it working. I will forward your vivado feedabck for our marketing floks.
Yes for DFx RP we used bit format. We are moving in to .bin format for all dynamic configurations in 2024.1
Please see above comments.
Hello, there might be a command update missing on the following file dtgen_dfx file.
The file contains the following commands (on lines 153-158):
However, the documentation of the Platform-Create Command does not contain the
-rm-hw
flag.I also created a post in Xilinx Community Forum that explains the issue in more detail, you can find it here.
Can someone confirm if this is an issue?
Thanks in advance for any help provided.