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Xilinx / mlir-aie

An MLIR-based toolchain for AMD AI Engine-enabled devices.
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Check that finite length fields in buffer descriptors are validated for each tile type. #1097

Open SamuelBayliss opened 6 months ago

SamuelBayliss commented 6 months ago

Shim DMA, Mem DMA and Tile DMA descriptors have fields with different lengths.

e.g. the buffer_length field is 32-bits in AIE2 for shim tiles, 17-bits for mem tiles and 14-bits for compute tiles.

SamuelBayliss commented 6 months ago

Nivedh ran into issues based on line 1577 on AIEDielect.cpp