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Xilinx / mlir-aie

An MLIR-based toolchain for AMD AI Engine-enabled devices.
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ASPLOS Tutorial Corrections #1391

Closed andrej closed 5 months ago

andrej commented 7 months ago

I just gave the ASPLOS tutorial a front-to-back readthrough. Some suggestions are in PR #1390. Overall the tutorial was very nicely structured.

Potential Bugs - I think those should be addressed before the tutorial.

  1. section-1 code block 3 and 5: Is it @device(AIEDevice.npu) or @device(AIEDevice.ipu)? The tutorial description and associated code is inconsistent with respect to this (code says IPU, tutorial says NPU). Also check section-3 code block 1.

Nitpicks - Feel free to ignore all of these. These are really not important. But since I already noted them down, I'll still share them.

  1. Would it make sense to capitalize MLIR-AIE? Having all-lowercase mlir-aie looks somewhat unprofessional / like a typo to me.
  2. All titles are underlined. Users usually expect underlined text to be links and it is generally advised to never underline anything that is not a link (third bullet point).
  3. Why are we capitalizing "Shim" and "Mem" tiles, but not "compute" tiles?
  4. section-2a: paragraph starting with "When acquiring the objects of an Object FIFO" seems redundant with previous paragraph
  5. I liked the subsection table-of-contents in section-4 a lot. Adding a similar thing to section-2 could be nice.
jgmelber commented 7 months ago

1410